A. Gersnoviez, M. Brox, M. Montijano, Juan A. Sújar, C. Moreno
{"title":"UCOMIPSIM 2.0:流水线MIPS架构模拟器","authors":"A. Gersnoviez, M. Brox, M. Montijano, Juan A. Sújar, C. Moreno","doi":"10.1109/TAEE.2018.8476063","DOIUrl":null,"url":null,"abstract":"The objective of this work is the realization of an application in JAVA whose function will be to simulate the MIPS 32-bit architecture in pipelined computer with hardwired control unit, in order to help in the learning and understanding of this architecture by the students in Computer Architecture subjects. With it, students will be able to graphically visualize the datapath of multiple MIPS instructions passing through the different stages of the pipelined computer.","PeriodicalId":304068,"journal":{"name":"2018 XIII Technologies Applied to Electronics Teaching Conference (TAEE)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"UCOMIPSIM 2.0: Pipelined MIPS Architecture Simulator\",\"authors\":\"A. Gersnoviez, M. Brox, M. Montijano, Juan A. Sújar, C. Moreno\",\"doi\":\"10.1109/TAEE.2018.8476063\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The objective of this work is the realization of an application in JAVA whose function will be to simulate the MIPS 32-bit architecture in pipelined computer with hardwired control unit, in order to help in the learning and understanding of this architecture by the students in Computer Architecture subjects. With it, students will be able to graphically visualize the datapath of multiple MIPS instructions passing through the different stages of the pipelined computer.\",\"PeriodicalId\":304068,\"journal\":{\"name\":\"2018 XIII Technologies Applied to Electronics Teaching Conference (TAEE)\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 XIII Technologies Applied to Electronics Teaching Conference (TAEE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TAEE.2018.8476063\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 XIII Technologies Applied to Electronics Teaching Conference (TAEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TAEE.2018.8476063","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The objective of this work is the realization of an application in JAVA whose function will be to simulate the MIPS 32-bit architecture in pipelined computer with hardwired control unit, in order to help in the learning and understanding of this architecture by the students in Computer Architecture subjects. With it, students will be able to graphically visualize the datapath of multiple MIPS instructions passing through the different stages of the pipelined computer.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
