Optical flow extraction based on reuse of intermediate results and VLSI implementation

High-speed optical flow extraction plays an important role in real-world systems such as highly safe vehicles. This paper presents a VLSI-oriented algorithm to reduce a computational amount based on reuse of intermediate results. Moreover, a functional unit allocation for a simple interconnection network between processing elements is also proposed based on analysis of data dependency. The performance of the VLSI processor designed in a 0.35/spl mu/m CMOS technology is more than 10 000 times higher than that of a microprocessor (Pentium III 550MHz).