{"title":"增量设计中FPGA配置的细粒度操作","authors":"Wenwei Zha, P. Athanas","doi":"10.1109/IPDPSW.2013.199","DOIUrl":null,"url":null,"abstract":"This paper presents the technique of manipulating FPGA configuration in fine granularity to improve the efficiency of incremental design. The main contributions are achieving hardware autonomy and enhancing hardware development productivity, demonstrated by two categories of applications: implementing Autonomous Adaptive Systems and Fast System Progotyping. Vendor tools provide limited facilitation for these applications. For the first category, a system with a universal UART transmitter is demonstrated on the ML410 FPGA board. The BAUD rate generating circuit is autonomously modified in hardware to adapt to the requirement of a remote UART receiver. For the second category, fast module assembly for prototyping a GNU Radio system is demonstrated on the XUPV5-LX110T FPGA board. Its run-time is tens of times faster than that of the vendor tool. Moreover, to evaluate the quality of the proposed fine-grained manipulation, wire delay information is approximated through brute-force analysis. The delay estimation result achieves accuracy within 6% error as compared to that of the vendor tool's.","PeriodicalId":234552,"journal":{"name":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fine-Grained Manipulation of FPGA Configuration for Incremental Design\",\"authors\":\"Wenwei Zha, P. Athanas\",\"doi\":\"10.1109/IPDPSW.2013.199\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the technique of manipulating FPGA configuration in fine granularity to improve the efficiency of incremental design. The main contributions are achieving hardware autonomy and enhancing hardware development productivity, demonstrated by two categories of applications: implementing Autonomous Adaptive Systems and Fast System Progotyping. Vendor tools provide limited facilitation for these applications. For the first category, a system with a universal UART transmitter is demonstrated on the ML410 FPGA board. The BAUD rate generating circuit is autonomously modified in hardware to adapt to the requirement of a remote UART receiver. For the second category, fast module assembly for prototyping a GNU Radio system is demonstrated on the XUPV5-LX110T FPGA board. Its run-time is tens of times faster than that of the vendor tool. Moreover, to evaluate the quality of the proposed fine-grained manipulation, wire delay information is approximated through brute-force analysis. The delay estimation result achieves accuracy within 6% error as compared to that of the vendor tool's.\",\"PeriodicalId\":234552,\"journal\":{\"name\":\"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-05-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPDPSW.2013.199\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPDPSW.2013.199","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fine-Grained Manipulation of FPGA Configuration for Incremental Design
This paper presents the technique of manipulating FPGA configuration in fine granularity to improve the efficiency of incremental design. The main contributions are achieving hardware autonomy and enhancing hardware development productivity, demonstrated by two categories of applications: implementing Autonomous Adaptive Systems and Fast System Progotyping. Vendor tools provide limited facilitation for these applications. For the first category, a system with a universal UART transmitter is demonstrated on the ML410 FPGA board. The BAUD rate generating circuit is autonomously modified in hardware to adapt to the requirement of a remote UART receiver. For the second category, fast module assembly for prototyping a GNU Radio system is demonstrated on the XUPV5-LX110T FPGA board. Its run-time is tens of times faster than that of the vendor tool. Moreover, to evaluate the quality of the proposed fine-grained manipulation, wire delay information is approximated through brute-force analysis. The delay estimation result achieves accuracy within 6% error as compared to that of the vendor tool's.