{"title":"用于全局数据库访问的基于多台pc机的体系结构","authors":"M. Chandwani, P. Dandekar, A. Jain, R. Jain","doi":"10.1109/IECON.1990.149182","DOIUrl":null,"url":null,"abstract":"An architecture for a number of personal computers (PCs) connected in a hierarchical organization is presented. The objective of the architecture is to provide access to a global database for data sharing. The hardware of the proposed architecture, which includes memory mappings, bus arbiter logic, and PC connections, is described. The architecture is functionally compared with conventional single-bus architectures. The performances are compared in terms of throughput.<<ETX>>","PeriodicalId":253424,"journal":{"name":"[Proceedings] IECON '90: 16th Annual Conference of IEEE Industrial Electronics Society","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-11-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A multiple-PC based architecture for global database access\",\"authors\":\"M. Chandwani, P. Dandekar, A. Jain, R. Jain\",\"doi\":\"10.1109/IECON.1990.149182\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An architecture for a number of personal computers (PCs) connected in a hierarchical organization is presented. The objective of the architecture is to provide access to a global database for data sharing. The hardware of the proposed architecture, which includes memory mappings, bus arbiter logic, and PC connections, is described. The architecture is functionally compared with conventional single-bus architectures. The performances are compared in terms of throughput.<<ETX>>\",\"PeriodicalId\":253424,\"journal\":{\"name\":\"[Proceedings] IECON '90: 16th Annual Conference of IEEE Industrial Electronics Society\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-11-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[Proceedings] IECON '90: 16th Annual Conference of IEEE Industrial Electronics Society\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IECON.1990.149182\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings] IECON '90: 16th Annual Conference of IEEE Industrial Electronics Society","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IECON.1990.149182","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A multiple-PC based architecture for global database access
An architecture for a number of personal computers (PCs) connected in a hierarchical organization is presented. The objective of the architecture is to provide access to a global database for data sharing. The hardware of the proposed architecture, which includes memory mappings, bus arbiter logic, and PC connections, is described. The architecture is functionally compared with conventional single-bus architectures. The performances are compared in terms of throughput.<>