{"title":"一种单元件CMOS-LRRM VNA电子校准技术","authors":"Jun-Chau Chien, A. Niknejad","doi":"10.1109/arftg54656.2022.9896578","DOIUrl":null,"url":null,"abstract":"This paper presents a single-element CMOS-based electronic calibration (E-Cal) technique for millimeter-wave VNA measurements. The structure employs a CMOS transmission line loaded with a shunt NMOS transistor at its center tap. By taking advantage of the structure symmetry, the standard LRRM calibration flow can be implemented with the transistor biased at different impedance states. The approach is justified using a 65nm CMOS test chip and the measurements of passive DUTs.","PeriodicalId":375242,"journal":{"name":"2022 99th ARFTG Microwave Measurement Conference (ARFTG)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Single-Element CMOS-LRRM VNA Electronic Calibration Technique\",\"authors\":\"Jun-Chau Chien, A. Niknejad\",\"doi\":\"10.1109/arftg54656.2022.9896578\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a single-element CMOS-based electronic calibration (E-Cal) technique for millimeter-wave VNA measurements. The structure employs a CMOS transmission line loaded with a shunt NMOS transistor at its center tap. By taking advantage of the structure symmetry, the standard LRRM calibration flow can be implemented with the transistor biased at different impedance states. The approach is justified using a 65nm CMOS test chip and the measurements of passive DUTs.\",\"PeriodicalId\":375242,\"journal\":{\"name\":\"2022 99th ARFTG Microwave Measurement Conference (ARFTG)\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 99th ARFTG Microwave Measurement Conference (ARFTG)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/arftg54656.2022.9896578\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 99th ARFTG Microwave Measurement Conference (ARFTG)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/arftg54656.2022.9896578","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Single-Element CMOS-LRRM VNA Electronic Calibration Technique
This paper presents a single-element CMOS-based electronic calibration (E-Cal) technique for millimeter-wave VNA measurements. The structure employs a CMOS transmission line loaded with a shunt NMOS transistor at its center tap. By taking advantage of the structure symmetry, the standard LRRM calibration flow can be implemented with the transistor biased at different impedance states. The approach is justified using a 65nm CMOS test chip and the measurements of passive DUTs.