Arezoo Dabaghi Zarandi, A. Rubio, M. R. Reshadinezhad
{"title":"基于忆阻器的自适应噪声容限四元存储器","authors":"Arezoo Dabaghi Zarandi, A. Rubio, M. R. Reshadinezhad","doi":"10.1109/DCIS51330.2020.9268675","DOIUrl":null,"url":null,"abstract":"Considering the constraints of CMOS technology progress at the nano-domain, memristor technology is one of the preferred alternatives to merge with and substitute CMOS-based memory circuits. At the same time to increase the bandwidth of memories, increase storage density and decrease the interconnection complexity of circuits, multiple-valued logic (MVL) based circuit memories are being introduced as an efficient alternative. As resistive random access memory (ReRAM) is a non-volatile memory and memristor cells allow analog multilevel behavior, they are suitable device to store multiple-level bits of information. Different sources of noise and perturbances may affect the original values of data during the transferring and storing processes. A hybrid scenario based on CMOS and memristor technology is proposed here to recover the stored multiple noisy-perturbed values of resistive random-access memory in an efficient way. To show the correctness of the proposed method, affected images are simulated with Matlab software at system level showing its efficiency.","PeriodicalId":186963,"journal":{"name":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Memristor-based Quaternary Memory with Adaptive Noise Tolerance\",\"authors\":\"Arezoo Dabaghi Zarandi, A. Rubio, M. R. Reshadinezhad\",\"doi\":\"10.1109/DCIS51330.2020.9268675\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Considering the constraints of CMOS technology progress at the nano-domain, memristor technology is one of the preferred alternatives to merge with and substitute CMOS-based memory circuits. At the same time to increase the bandwidth of memories, increase storage density and decrease the interconnection complexity of circuits, multiple-valued logic (MVL) based circuit memories are being introduced as an efficient alternative. As resistive random access memory (ReRAM) is a non-volatile memory and memristor cells allow analog multilevel behavior, they are suitable device to store multiple-level bits of information. Different sources of noise and perturbances may affect the original values of data during the transferring and storing processes. A hybrid scenario based on CMOS and memristor technology is proposed here to recover the stored multiple noisy-perturbed values of resistive random-access memory in an efficient way. To show the correctness of the proposed method, affected images are simulated with Matlab software at system level showing its efficiency.\",\"PeriodicalId\":186963,\"journal\":{\"name\":\"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)\",\"volume\":\"78 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-11-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DCIS51330.2020.9268675\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCIS51330.2020.9268675","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Memristor-based Quaternary Memory with Adaptive Noise Tolerance
Considering the constraints of CMOS technology progress at the nano-domain, memristor technology is one of the preferred alternatives to merge with and substitute CMOS-based memory circuits. At the same time to increase the bandwidth of memories, increase storage density and decrease the interconnection complexity of circuits, multiple-valued logic (MVL) based circuit memories are being introduced as an efficient alternative. As resistive random access memory (ReRAM) is a non-volatile memory and memristor cells allow analog multilevel behavior, they are suitable device to store multiple-level bits of information. Different sources of noise and perturbances may affect the original values of data during the transferring and storing processes. A hybrid scenario based on CMOS and memristor technology is proposed here to recover the stored multiple noisy-perturbed values of resistive random-access memory in an efficient way. To show the correctness of the proposed method, affected images are simulated with Matlab software at system level showing its efficiency.