KCNN:使用紧凑卷积神经网络的高效硬件关键点检测

Paolo Di Febbo, Carlo Dal Mutto, Kinh H. Tieu, S. Mattoccia
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引用次数: 16

摘要

关键点检测算法通常是基于用标准图像滤波方法实现的导数操作的手工组合。卷积神经网络(cnn)用于图像分类的早期层,其实现现在通常在优化的硬件单元中可用,其特征是类似的架构。因此,探索cnn用于关键点检测是获得低延迟实现的有希望的途径,也能够有效地将检测的计算成本转移到专用的神经网络处理单元。本文提出了一种利用紧凑的三层结构的高效CNN进行关键点检测的方法。提出了一种新的训练方法来学习网络参数的值,该方法允许近似手工制作的检测器的响应,表明所提出的体系结构能够获得与最先进的结果相媲美的结果。模拟不同检测器的功能允许通过简单地重新训练网络将各种算法部署到专用硬件。提出了一种基于传感器的FPGA实现所介绍的CNN架构,允许延迟小于1 [ms]。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
KCNN: Extremely-Efficient Hardware Keypoint Detection with a Compact Convolutional Neural Network
Keypoint detection algorithms are typically based on handcrafted combinations of derivative operations implemented with standard image filtering approaches. The early layers of Convolutional Neural Networks (CNNs) for image classification, whose implementation is nowadays often available within optimized hardware units, are characterized by a similar architecture. Therefore, the exploration of CNNs for keypoint detection is a promising avenue to obtain a low-latency implementation, also enabling to effectively move the computational cost of the detection to dedicated Neural Network processing units. This paper proposes a methodology for effective keypoint detection by means of an efficient CNN characterized by a compact three-layer architecture. A novel training procedure is proposed for learning values of the network parameters which allow for an approximation of the response of handcrafted detectors, showing that the proposed architecture is able to obtain results comparable with the state of the art. The capability of emulating different detectors allows to deploy a variety of algorithms to dedicated hardware by simply retraining the network. A sensor-based FPGA implementation of the introduced CNN architecture is presented, allowing latency smaller than 1 [ms].
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