{"title":"为今天的高速巴士终点站供电","authors":"R. E. Taylor","doi":"10.1109/APEC.1998.647733","DOIUrl":null,"url":null,"abstract":"The days of 20-50 MHz clocks are dying or gone. With the 75-300 MHz and faster clock rates of today, computer manufactures are faced with problems never seen before. It is no longer possible to ignore the inductance and resistance of device pins and power planes or the 0.5 V ring that occurs after a TTL (transistor-transistor logic), clock or signal edge. Power supplies can no longer be connected to systems with 6 ft power cables, at least not without adding large amounts of bulk decoupling capacitors. With today's newer ECL (emitter coupled logic), NTL (NMOS transistor logic) or GTL (gunning transistor logic) that only have a 0.8 to 1 V logic swings, a 0.5 V ring is going to cause definite problems in the signals. Powering today's processors and associated high speed data buses has brought a new world of challenges from a power supply stand point. Within some areas in a system, \"distributed power\" is the only practical solution. Bus terminators are one of these areas. Though, at a circuit card level, distributed power is not new, having to mount the power supply in very close proximity to the circuits that are being powered is fairly new to many. This article aims to help understand the problems involved and to point toward possible solutions.","PeriodicalId":156715,"journal":{"name":"APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-02-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Powering today's high speed bus terminators\",\"authors\":\"R. E. Taylor\",\"doi\":\"10.1109/APEC.1998.647733\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The days of 20-50 MHz clocks are dying or gone. With the 75-300 MHz and faster clock rates of today, computer manufactures are faced with problems never seen before. It is no longer possible to ignore the inductance and resistance of device pins and power planes or the 0.5 V ring that occurs after a TTL (transistor-transistor logic), clock or signal edge. Power supplies can no longer be connected to systems with 6 ft power cables, at least not without adding large amounts of bulk decoupling capacitors. With today's newer ECL (emitter coupled logic), NTL (NMOS transistor logic) or GTL (gunning transistor logic) that only have a 0.8 to 1 V logic swings, a 0.5 V ring is going to cause definite problems in the signals. Powering today's processors and associated high speed data buses has brought a new world of challenges from a power supply stand point. Within some areas in a system, \\\"distributed power\\\" is the only practical solution. Bus terminators are one of these areas. Though, at a circuit card level, distributed power is not new, having to mount the power supply in very close proximity to the circuits that are being powered is fairly new to many. This article aims to help understand the problems involved and to point toward possible solutions.\",\"PeriodicalId\":156715,\"journal\":{\"name\":\"APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition\",\"volume\":\"44 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-02-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APEC.1998.647733\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.1998.647733","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The days of 20-50 MHz clocks are dying or gone. With the 75-300 MHz and faster clock rates of today, computer manufactures are faced with problems never seen before. It is no longer possible to ignore the inductance and resistance of device pins and power planes or the 0.5 V ring that occurs after a TTL (transistor-transistor logic), clock or signal edge. Power supplies can no longer be connected to systems with 6 ft power cables, at least not without adding large amounts of bulk decoupling capacitors. With today's newer ECL (emitter coupled logic), NTL (NMOS transistor logic) or GTL (gunning transistor logic) that only have a 0.8 to 1 V logic swings, a 0.5 V ring is going to cause definite problems in the signals. Powering today's processors and associated high speed data buses has brought a new world of challenges from a power supply stand point. Within some areas in a system, "distributed power" is the only practical solution. Bus terminators are one of these areas. Though, at a circuit card level, distributed power is not new, having to mount the power supply in very close proximity to the circuits that are being powered is fairly new to many. This article aims to help understand the problems involved and to point toward possible solutions.