基于90nm CMOS技术的高效节能物联网应用的4位和5位闪存ADC设计与分析

2021 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS) Pub Date : 2021-12-01 DOI:10.1109/iSES52644.2021.00057

V. Koundinya, Madanu Karun Chand, D. Dhushyanth, Devarajugattu Jayanth Saikumar, Arumalla Varun Sai, Venu Birudu, R. Vaddi

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引用次数: 0

摘要

模数转换器(ADC)设计对于嵌入多个传感器的物联网平台的真实信号的准确和高效接口起着重要作用。本文设计并实现了一个Flash或直接转换的4位和5位adc。闪存ADC的性能是根据重要的性能指标进行评估的。所提出的4位ADC功耗为1.41mW，信噪比为26.184dB，信噪比为3.71 ENOB, FoM为16.19 pJ/步;5位ADC功耗为2.921mW，信噪比为31.149dB，信噪比为4.51 ENOB, FoM为19.12 pJ/步。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Design and Analysis of 4-bit and 5-bit Flash ADC’s in 90nm CMOS Technology for Energy Efficient IoT Applications

Analog-to-Digital Converter (ADC) design plays an important role for accurate and efficient interfacing of real-world signals for IoT platforms embedded with multiple sensors. In this paper, a Flash or direct conversion 4-bit and 5-bit ADCs are designed and implemented in 90nm CMOS. The performance of the flash ADC is evaluated against important performance metrices. The proposed 4-bit ADC achieve a power consumption of 1.41mW, SNR of 26.184dB, 3.71 ENOB and 16.19 pJ/step of FoM and 5-bit ADC achieve a power consumption of 2.921mW, SNR of 31.149dB, 4.51 ENOB and 19.12 pJ/step of FoM.

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2021 IEEE International Symposium on Smart Electronic Systems (iSES) (Formerly iNiS)

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