在特定环境下合成低功耗异步电路

Proceedings of 1997 International Symposium on Low Power Electronics and Design Pub Date : 1997-08-01 DOI:10.1145/263272.263291

S. Nowick, Michael Theobald

{"title":"在特定环境下合成低功耗异步电路","authors":"S. Nowick, Michael Theobald","doi":"10.1145/263272.263291","DOIUrl":null,"url":null,"abstract":"We introduce a new method for the synthesis of power-optimal asynchronous control-circuits. The method includes two steps: (i) an exact algorithm for 2-level synthesis, and (ii) heuristic algorithms for multi-level synthesis. Unlike most existing synchronous algorithms, we incorporate both temporal dependence and glitch activity in our model to guide synthesis. Results, using only our 2-level minimization, show power reduction up to 33%.","PeriodicalId":334688,"journal":{"name":"Proceedings of 1997 International Symposium on Low Power Electronics and Design","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Synthesis of low-power asynchronous circuits in a specified environment\",\"authors\":\"S. Nowick, Michael Theobald\",\"doi\":\"10.1145/263272.263291\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We introduce a new method for the synthesis of power-optimal asynchronous control-circuits. The method includes two steps: (i) an exact algorithm for 2-level synthesis, and (ii) heuristic algorithms for multi-level synthesis. Unlike most existing synchronous algorithms, we incorporate both temporal dependence and glitch activity in our model to guide synthesis. Results, using only our 2-level minimization, show power reduction up to 33%.\",\"PeriodicalId\":334688,\"journal\":{\"name\":\"Proceedings of 1997 International Symposium on Low Power Electronics and Design\",\"volume\":\"43 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1997 International Symposium on Low Power Electronics and Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/263272.263291\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1997 International Symposium on Low Power Electronics and Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/263272.263291","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 5

摘要

介绍了一种合成功率最优异步控制电路的新方法。该方法包括两个步骤:(i)精确算法用于2级综合，(ii)启发式算法用于多级综合。与大多数现有的同步算法不同，我们在模型中结合了时间依赖性和故障活动来指导合成。结果，仅使用我们的2级最小化，显示功耗降低高达33%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Synthesis of low-power asynchronous circuits in a specified environment

We introduce a new method for the synthesis of power-optimal asynchronous control-circuits. The method includes two steps: (i) an exact algorithm for 2-level synthesis, and (ii) heuristic algorithms for multi-level synthesis. Unlike most existing synchronous algorithms, we incorporate both temporal dependence and glitch activity in our model to guide synthesis. Results, using only our 2-level minimization, show power reduction up to 33%.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of 1997 International Symposium on Low Power Electronics and Design

自引率

0.00%

发文量