{"title":"分布式系统综合的过程逻辑","authors":"Yoshinao Isobe, K. Ohmaki","doi":"10.1109/APSEC.2000.896684","DOIUrl":null,"url":null,"abstract":"We define a process algebra DS@ to formally describe distributed systems and a process logic SP@ to formally describe their specifications. Then, we present a method to synthesize a distributed system (described in DS@) from given specifications (described in SP@). The main contribution is to show how to check the satisfiability of process logic in which concurrent behavior is distinct from interleaving behavior (i.e. considering true concurrency).","PeriodicalId":404621,"journal":{"name":"Proceedings Seventh Asia-Pacific Software Engeering Conference. APSEC 2000","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A process logic for distributed system synthesis\",\"authors\":\"Yoshinao Isobe, K. Ohmaki\",\"doi\":\"10.1109/APSEC.2000.896684\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We define a process algebra DS@ to formally describe distributed systems and a process logic SP@ to formally describe their specifications. Then, we present a method to synthesize a distributed system (described in DS@) from given specifications (described in SP@). The main contribution is to show how to check the satisfiability of process logic in which concurrent behavior is distinct from interleaving behavior (i.e. considering true concurrency).\",\"PeriodicalId\":404621,\"journal\":{\"name\":\"Proceedings Seventh Asia-Pacific Software Engeering Conference. APSEC 2000\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-12-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Seventh Asia-Pacific Software Engeering Conference. APSEC 2000\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APSEC.2000.896684\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Seventh Asia-Pacific Software Engeering Conference. APSEC 2000","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APSEC.2000.896684","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We define a process algebra DS@ to formally describe distributed systems and a process logic SP@ to formally describe their specifications. Then, we present a method to synthesize a distributed system (described in DS@) from given specifications (described in SP@). The main contribution is to show how to check the satisfiability of process logic in which concurrent behavior is distinct from interleaving behavior (i.e. considering true concurrency).
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