一种用于容错VLSI和WSI阵列的实时重构算法

Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems Pub Date : 1992-11-04 DOI:10.1109/DFTVS.1992.224368

H. Al-Asaad, M. Vai

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引用次数: 0

摘要

可靠性是VLSI阵列处理器实时运行中的一个重要问题。提出了一种VLSI和WSI阵列实时重构的新算法。该算法具有简单、局部性好等特点。这种重构方案的控制是在硬件上实现的，以便实时执行。它支持多种故障，包括零退化时间的瞬态/间歇故障。仿真结果表明，该方法具有良好的备用利用率，且计算复杂度与阵列大小无关

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A real-time reconfiguration algorithm for fault-tolerant VLSI and WSI arrays

Reliability is an important issue in the real-time operations of VLSI array processors. A new algorithm for the real-time reconfiguration of VLSI and WSI arrays is presented. This algorithm is characterized by its simplicity and locality. The control of this reconfiguration scheme is implemented in hardware for a real time execution. It supports multiple faults including transient/intermittent faults with a zero degradation time. Simulation results show that a good spare utilization rate is achieved with a computational complexity that is independent of the array size.<>

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Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems

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