基于沃尔什变换的雷达接收机采样率转换

Bai Liyun, Wen Bi-yang, Shen Wei, W. XianRong
{"title":"基于沃尔什变换的雷达接收机采样率转换","authors":"Bai Liyun, Wen Bi-yang, Shen Wei, W. XianRong","doi":"10.1109/APMC.2005.1606345","DOIUrl":null,"url":null,"abstract":"Current SRC methods can consume a large fraction of the digital signal processor resources leaving limited computational power for other tasks. Reducing the computational requirements for SRC is a key element for the success and profitability of SWR systems. An efficient decimation architecture using Walsh transform for HF surface wave radar receivers is presented. The proposed takes into consideration the complexities of algorithm due to the relatively high data rate and the intensive filter operations involved in commonly used decimators, which substitute multiplication-addition for addition-subtraction imposed on filter. Performances illustrative are compared with that of other similar decimators. Experiments results show that the new decimators outperform others, which is suited for real time signal processing in DSP, such as ADSP2 1060.","PeriodicalId":253574,"journal":{"name":"2005 Asia-Pacific Microwave Conference Proceedings","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Sample rate conversion using Walsh-transform for radar receiver\",\"authors\":\"Bai Liyun, Wen Bi-yang, Shen Wei, W. XianRong\",\"doi\":\"10.1109/APMC.2005.1606345\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Current SRC methods can consume a large fraction of the digital signal processor resources leaving limited computational power for other tasks. Reducing the computational requirements for SRC is a key element for the success and profitability of SWR systems. An efficient decimation architecture using Walsh transform for HF surface wave radar receivers is presented. The proposed takes into consideration the complexities of algorithm due to the relatively high data rate and the intensive filter operations involved in commonly used decimators, which substitute multiplication-addition for addition-subtraction imposed on filter. Performances illustrative are compared with that of other similar decimators. Experiments results show that the new decimators outperform others, which is suited for real time signal processing in DSP, such as ADSP2 1060.\",\"PeriodicalId\":253574,\"journal\":{\"name\":\"2005 Asia-Pacific Microwave Conference Proceedings\",\"volume\":\"48 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 Asia-Pacific Microwave Conference Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APMC.2005.1606345\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 Asia-Pacific Microwave Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APMC.2005.1606345","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10

摘要

目前的SRC方法可能会消耗大量的数字信号处理器资源,从而使有限的计算能力用于其他任务。减少SRC的计算需求是SWR系统成功和盈利的关键因素。提出了一种基于沃尔什变换的高频表面波雷达接收机抽取结构。该算法考虑到算法的复杂性,因为它具有较高的数据速率和常用的十进制数所涉及的密集的滤波操作,它用乘法加法代替加法减法施加在滤波器上。并与其它同类抽取器的性能进行了比较。实验结果表明,该算法性能优越,适用于adsp21060等DSP的实时信号处理。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Sample rate conversion using Walsh-transform for radar receiver
Current SRC methods can consume a large fraction of the digital signal processor resources leaving limited computational power for other tasks. Reducing the computational requirements for SRC is a key element for the success and profitability of SWR systems. An efficient decimation architecture using Walsh transform for HF surface wave radar receivers is presented. The proposed takes into consideration the complexities of algorithm due to the relatively high data rate and the intensive filter operations involved in commonly used decimators, which substitute multiplication-addition for addition-subtraction imposed on filter. Performances illustrative are compared with that of other similar decimators. Experiments results show that the new decimators outperform others, which is suited for real time signal processing in DSP, such as ADSP2 1060.
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