{"title":"多核平台主机编译仿真","authors":"A. Gerstlauer","doi":"10.1109/RSP.2010.5656355","DOIUrl":null,"url":null,"abstract":"Virtual platform models are a popular approach for virtual prototyping of multi-processor/multi-core systems-on-chip (MPCSoCs). Such models aid in system-level design, rapid and early design space exploration, as well as early software development. Traditionally, either highly abstracted models for exploration or low-level, implementation-oriented models for development have been employed. Host-compiled models promise to fill this gap by providing both fast and accurate platform simulation and prototyping. In this paper, we aim to provide an overview of state-of-the-art host-compiled platform modeling concepts, techniques and their applicability and benefits.","PeriodicalId":133782,"journal":{"name":"Proceedings of 2010 21st IEEE International Symposium on Rapid System Protyping","volume":"130 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Host-compiled simulation of multi-core platforms\",\"authors\":\"A. Gerstlauer\",\"doi\":\"10.1109/RSP.2010.5656355\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Virtual platform models are a popular approach for virtual prototyping of multi-processor/multi-core systems-on-chip (MPCSoCs). Such models aid in system-level design, rapid and early design space exploration, as well as early software development. Traditionally, either highly abstracted models for exploration or low-level, implementation-oriented models for development have been employed. Host-compiled models promise to fill this gap by providing both fast and accurate platform simulation and prototyping. In this paper, we aim to provide an overview of state-of-the-art host-compiled platform modeling concepts, techniques and their applicability and benefits.\",\"PeriodicalId\":133782,\"journal\":{\"name\":\"Proceedings of 2010 21st IEEE International Symposium on Rapid System Protyping\",\"volume\":\"130 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 2010 21st IEEE International Symposium on Rapid System Protyping\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RSP.2010.5656355\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 2010 21st IEEE International Symposium on Rapid System Protyping","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RSP.2010.5656355","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Virtual platform models are a popular approach for virtual prototyping of multi-processor/multi-core systems-on-chip (MPCSoCs). Such models aid in system-level design, rapid and early design space exploration, as well as early software development. Traditionally, either highly abstracted models for exploration or low-level, implementation-oriented models for development have been employed. Host-compiled models promise to fill this gap by providing both fast and accurate platform simulation and prototyping. In this paper, we aim to provide an overview of state-of-the-art host-compiled platform modeling concepts, techniques and their applicability and benefits.
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