Udara S. Somarathna, M. Alhendi, B. Garakani, M. Poliks, D. Weerawarne, J. Iannotti, C. Kapusta, N. Stoffel, S. G. Gonya
{"title":"热应力对柔性基板全印刷过孔可靠性的影响","authors":"Udara S. Somarathna, M. Alhendi, B. Garakani, M. Poliks, D. Weerawarne, J. Iannotti, C. Kapusta, N. Stoffel, S. G. Gonya","doi":"10.1109/ectc51906.2022.00259","DOIUrl":null,"url":null,"abstract":"Reliability of all-printed vias fabricated on flexible polymer substrates is crucial for the proper functionality of flexible hybrid electronics (FHE) which involve interconnected multilayer electronic circuitry. Existing literature primarily focuses on the mechanical reliability of all-printed vias on flexible polymer substrates fabricated by screen printing and inkjet printing techniques. Therefore, in this work, we present new experimental evidence on the reliability of all-printed vias under thermal shock. The details of the fabrication process, optical characterization, and thermal shock testing are discussed in this paper. Two different fabrication process flows were adopted to obtain all-printed partially-filled blind vias and wall-coated through-hole vias. Vias of 50 - 300 μm diameter were laser drilled on a 3-mil polyimide substrate and printed by screen printing and aerosol-jet printing techniques using three types of microparticle- and nanoparticle-based conductive inks of different viscosities. The performance of the all-printed vias was evaluated based on the interlayer electrical connectivity and the change in electrical resistance after exposure to repeated thermal shock cycles. The experimental results show that the all-printed vias are robust and reliable under thermal shock in the temperature (°C) range of -55 to 125.","PeriodicalId":139520,"journal":{"name":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"The Effect of Thermal Stress on the Reliability of all-Printed Vias on Flexible Substrates\",\"authors\":\"Udara S. Somarathna, M. Alhendi, B. Garakani, M. Poliks, D. Weerawarne, J. Iannotti, C. Kapusta, N. Stoffel, S. G. Gonya\",\"doi\":\"10.1109/ectc51906.2022.00259\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Reliability of all-printed vias fabricated on flexible polymer substrates is crucial for the proper functionality of flexible hybrid electronics (FHE) which involve interconnected multilayer electronic circuitry. Existing literature primarily focuses on the mechanical reliability of all-printed vias on flexible polymer substrates fabricated by screen printing and inkjet printing techniques. Therefore, in this work, we present new experimental evidence on the reliability of all-printed vias under thermal shock. The details of the fabrication process, optical characterization, and thermal shock testing are discussed in this paper. Two different fabrication process flows were adopted to obtain all-printed partially-filled blind vias and wall-coated through-hole vias. Vias of 50 - 300 μm diameter were laser drilled on a 3-mil polyimide substrate and printed by screen printing and aerosol-jet printing techniques using three types of microparticle- and nanoparticle-based conductive inks of different viscosities. The performance of the all-printed vias was evaluated based on the interlayer electrical connectivity and the change in electrical resistance after exposure to repeated thermal shock cycles. The experimental results show that the all-printed vias are robust and reliable under thermal shock in the temperature (°C) range of -55 to 125.\",\"PeriodicalId\":139520,\"journal\":{\"name\":\"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ectc51906.2022.00259\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ectc51906.2022.00259","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The Effect of Thermal Stress on the Reliability of all-Printed Vias on Flexible Substrates
Reliability of all-printed vias fabricated on flexible polymer substrates is crucial for the proper functionality of flexible hybrid electronics (FHE) which involve interconnected multilayer electronic circuitry. Existing literature primarily focuses on the mechanical reliability of all-printed vias on flexible polymer substrates fabricated by screen printing and inkjet printing techniques. Therefore, in this work, we present new experimental evidence on the reliability of all-printed vias under thermal shock. The details of the fabrication process, optical characterization, and thermal shock testing are discussed in this paper. Two different fabrication process flows were adopted to obtain all-printed partially-filled blind vias and wall-coated through-hole vias. Vias of 50 - 300 μm diameter were laser drilled on a 3-mil polyimide substrate and printed by screen printing and aerosol-jet printing techniques using three types of microparticle- and nanoparticle-based conductive inks of different viscosities. The performance of the all-printed vias was evaluated based on the interlayer electrical connectivity and the change in electrical resistance after exposure to repeated thermal shock cycles. The experimental results show that the all-printed vias are robust and reliable under thermal shock in the temperature (°C) range of -55 to 125.