一个4位6GS/s基于时间的模数转换器

2014 26th International Conference on Microelectronics (ICM) Pub Date : 2014-12-01 DOI:10.1109/ICM.2014.7071814

Assem Hussein, Mahmoud Fawzy, M. Ismail, Mohamed Refky, H. Mostafa

{"title":"一个4位6GS/s基于时间的模数转换器","authors":"Assem Hussein, Mahmoud Fawzy, M. Ismail, Mohamed Refky, H. Mostafa","doi":"10.1109/ICM.2014.7071814","DOIUrl":null,"url":null,"abstract":"This paper proposes a 4-bit 6GS/s Time-Based Analog-to-Digital Converter (TADC) to be integrated inside the Software Defined Radio (SDR) receivers. The TADC is mainly composed of two blocks which are the Voltage-to-Time Converter (VTC) and the Time-to-Digital Converter (TDC). A prototype of the proposed TADC is implemented using 65 nm technology with a sampling rate of 6GS/s. An ENOB of 3.68 is achieved for an input frequency of 1.331 GHz. The whole system consumes a total power of 21.4 mW.","PeriodicalId":107354,"journal":{"name":"2014 26th International Conference on Microelectronics (ICM)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A 4-bit 6GS/s time-based analog-to-digital converter\",\"authors\":\"Assem Hussein, Mahmoud Fawzy, M. Ismail, Mohamed Refky, H. Mostafa\",\"doi\":\"10.1109/ICM.2014.7071814\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a 4-bit 6GS/s Time-Based Analog-to-Digital Converter (TADC) to be integrated inside the Software Defined Radio (SDR) receivers. The TADC is mainly composed of two blocks which are the Voltage-to-Time Converter (VTC) and the Time-to-Digital Converter (TDC). A prototype of the proposed TADC is implemented using 65 nm technology with a sampling rate of 6GS/s. An ENOB of 3.68 is achieved for an input frequency of 1.331 GHz. The whole system consumes a total power of 21.4 mW.\",\"PeriodicalId\":107354,\"journal\":{\"name\":\"2014 26th International Conference on Microelectronics (ICM)\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 26th International Conference on Microelectronics (ICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2014.7071814\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 26th International Conference on Microelectronics (ICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2014.7071814","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

本文提出了一种集成在软件定义无线电(SDR)接收机内的4位6GS/s时基模数转换器(TADC)。TDC主要由电压-时间转换器(VTC)和时间-数字转换器(TDC)两个模块组成。采用65nm技术实现了该tdac的原型，采样率为6GS/s。当输入频率为1.331 GHz时，ENOB值为3.68。整个系统的总功耗为21.4 mW。

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A 4-bit 6GS/s time-based analog-to-digital converter

This paper proposes a 4-bit 6GS/s Time-Based Analog-to-Digital Converter (TADC) to be integrated inside the Software Defined Radio (SDR) receivers. The TADC is mainly composed of two blocks which are the Voltage-to-Time Converter (VTC) and the Time-to-Digital Converter (TDC). A prototype of the proposed TADC is implemented using 65 nm technology with a sampling rate of 6GS/s. An ENOB of 3.68 is achieved for an input frequency of 1.331 GHz. The whole system consumes a total power of 21.4 mW.

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2014 26th International Conference on Microelectronics (ICM)

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