3mw w波段CMOS注入锁定分频器,锁定范围23.5 ghz

Yo‐Sheng Lin, K. Lan, Hsin-Chen Lin, Yun-Wen Lin
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引用次数: 0

摘要

报道了一种采用90nm CMOS技术的低功耗宽锁定范围w波段除以2直接注入锁定分频器(DILFD)。为了提高工作频率,采用分布式LC网络作为交叉耦合晶体管的负载。为了提高输入灵敏度,在开关晶体管的注入端设有功率匹配网络。此外,为了提高频率锁定范围,在开关晶体管中采用体偏置技术(即体电阻与零体源偏置相结合)来降低其阈值电压。结果表明,实现了23.5 GHz的宽锁定范围(28.9%)。DILFD可以在−35 dBm的低输入功率下工作,这是迄今为止w波段分频器中最好的输入灵敏度之一。DILFD的功耗为3mw。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
3 mW W-band CMOS injection-locked frequency divider with 23.5-GHz locking range
A low-power and wide-locking-range W-band divide-by-2 direct injection-locked frequency-divider (DILFD) using 90 nm CMOS technology is reported. To enhance the operation frequency, distributed LC network is used as the load of the crossed-coupled transistors. To improve the input sensitivity, a power matching network is included at the injection terminal of the switch transistor. In addition, to enhance the frequency locking range, body bias technique (i.e. a body resistor in conjunction with a zero body-source bias) is adopted in the switch transistor to reduce its threshold voltage. The result shows that a wide locking-range of 23.5 GHz (28.9%) was achieved. The DILFD can be operated at a low input power of −35 dBm, one of the best input sensitivity ever reported for a W-band divider. The power consumption of the DILFD was 3 mW.
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