{"title":"QCA中5输入多数门全加减法器的高效设计","authors":"Ramanand Jaiswal, T. Sasamal","doi":"10.1109/IC3.2017.8284336","DOIUrl":null,"url":null,"abstract":"Quantum dot cellular automata is the recent trend in the field of technology for the designing of any digital circuit involving inverters and majority gates that has the potential to substitute the age old technology of CMOS at the order of Nano level. Herein a full adder and full subtractor circuit is proposed using 5-input majority gate. The new full adder and subtractor reduced the requirement of occupied area, number of cells and energy dissipation. QCAPro tool is used for the calculation of energy dissipation. QCA designer 2.0.3 is used to design and simulate the circuits. A 4-bit ripple carry adder is also designed by one bit full adder.","PeriodicalId":147099,"journal":{"name":"2017 Tenth International Conference on Contemporary Computing (IC3)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"23","resultStr":"{\"title\":\"Efficient design of full adder and subtractor using 5-input majority gate in QCA\",\"authors\":\"Ramanand Jaiswal, T. Sasamal\",\"doi\":\"10.1109/IC3.2017.8284336\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Quantum dot cellular automata is the recent trend in the field of technology for the designing of any digital circuit involving inverters and majority gates that has the potential to substitute the age old technology of CMOS at the order of Nano level. Herein a full adder and full subtractor circuit is proposed using 5-input majority gate. The new full adder and subtractor reduced the requirement of occupied area, number of cells and energy dissipation. QCAPro tool is used for the calculation of energy dissipation. QCA designer 2.0.3 is used to design and simulate the circuits. A 4-bit ripple carry adder is also designed by one bit full adder.\",\"PeriodicalId\":147099,\"journal\":{\"name\":\"2017 Tenth International Conference on Contemporary Computing (IC3)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"23\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 Tenth International Conference on Contemporary Computing (IC3)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IC3.2017.8284336\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Tenth International Conference on Contemporary Computing (IC3)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IC3.2017.8284336","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Efficient design of full adder and subtractor using 5-input majority gate in QCA
Quantum dot cellular automata is the recent trend in the field of technology for the designing of any digital circuit involving inverters and majority gates that has the potential to substitute the age old technology of CMOS at the order of Nano level. Herein a full adder and full subtractor circuit is proposed using 5-input majority gate. The new full adder and subtractor reduced the requirement of occupied area, number of cells and energy dissipation. QCAPro tool is used for the calculation of energy dissipation. QCA designer 2.0.3 is used to design and simulate the circuits. A 4-bit ripple carry adder is also designed by one bit full adder.