Qian Zhou, Shifeng Zhang, Lu Jie, Guangtao Feng, Yan Han, Xiaoxia Han, C. Ray
{"title":"采用片上偏置电压控制技术的40nm CMOS v波段压控振荡器","authors":"Qian Zhou, Shifeng Zhang, Lu Jie, Guangtao Feng, Yan Han, Xiaoxia Han, C. Ray","doi":"10.1109/CCINTELS.2016.7878225","DOIUrl":null,"url":null,"abstract":"This paper presents a 40 nm CMOS V-band voltage-controlled oscillator (VCO). With using on-chip body bias voltage control technique, the phase noise and stability of the output signal are improved. The design was fabricated by RF Mixed-signal CMOS process with die size 0.078 mm2. Based on the silicon results, the proposed V-band VCO can achieve the phase noise of-86 dBc/Hz at 1 MHz offset. The VCO draws 17.8 mA current from a 1.2 V supply. Compared with the traditional structure VCO of the same batch, the measured FOM is optimized from-165.4 dB to-169 dB, meanwhile the output signal power offset is reduced by 1.8 dBm.","PeriodicalId":158982,"journal":{"name":"2016 2nd International Conference on Communication Control and Intelligent Systems (CCIS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 40 nm CMOS V-band VCO with on-chip body bias voltage control technique\",\"authors\":\"Qian Zhou, Shifeng Zhang, Lu Jie, Guangtao Feng, Yan Han, Xiaoxia Han, C. Ray\",\"doi\":\"10.1109/CCINTELS.2016.7878225\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a 40 nm CMOS V-band voltage-controlled oscillator (VCO). With using on-chip body bias voltage control technique, the phase noise and stability of the output signal are improved. The design was fabricated by RF Mixed-signal CMOS process with die size 0.078 mm2. Based on the silicon results, the proposed V-band VCO can achieve the phase noise of-86 dBc/Hz at 1 MHz offset. The VCO draws 17.8 mA current from a 1.2 V supply. Compared with the traditional structure VCO of the same batch, the measured FOM is optimized from-165.4 dB to-169 dB, meanwhile the output signal power offset is reduced by 1.8 dBm.\",\"PeriodicalId\":158982,\"journal\":{\"name\":\"2016 2nd International Conference on Communication Control and Intelligent Systems (CCIS)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 2nd International Conference on Communication Control and Intelligent Systems (CCIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CCINTELS.2016.7878225\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 2nd International Conference on Communication Control and Intelligent Systems (CCIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CCINTELS.2016.7878225","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 40 nm CMOS V-band VCO with on-chip body bias voltage control technique
This paper presents a 40 nm CMOS V-band voltage-controlled oscillator (VCO). With using on-chip body bias voltage control technique, the phase noise and stability of the output signal are improved. The design was fabricated by RF Mixed-signal CMOS process with die size 0.078 mm2. Based on the silicon results, the proposed V-band VCO can achieve the phase noise of-86 dBc/Hz at 1 MHz offset. The VCO draws 17.8 mA current from a 1.2 V supply. Compared with the traditional structure VCO of the same batch, the measured FOM is optimized from-165.4 dB to-169 dB, meanwhile the output signal power offset is reduced by 1.8 dBm.