Multiprocessor architecture for an optimazed parallel model of covariance based person detection

The covariance region descriptor has been proved robust in person detection application. However, detection is difficult to achieve on a serial processor. This is due to the large data set required to represent the image and the complex operations that need to be performed on the image. Multiprocessor systems (MPSoC) are usually adopted to speed up such application. In this paper, we propose a novel MPSoC architecture for fast person detection based on covariance descriptor. For this end, an optimized Khan Process Network parallel model of a covariance person detection application and the Sesame design and space exploration framework are used. Based on the optimal parallel model of covariance based person detection application, a multiprocessor architecture model is first proposed. These two models are modeled and validated using Sesame simulation. After that, the mapping of application tasks and channels on the architecture components is explored to define the optimal mapping architecture using execution time and platform cost. Results show that the six processors based architecture is the best when looking for the low computation cost and the four processors based architecture is the best when looking for the low cost.