利用碳纳米管场效应晶体管设计内容可寻址存储单元

Subhajit Das, Debaprasad Das, H. Rahaman
{"title":"利用碳纳米管场效应晶体管设计内容可寻址存储单元","authors":"Subhajit Das, Debaprasad Das, H. Rahaman","doi":"10.1109/TECHSYM.2016.7872669","DOIUrl":null,"url":null,"abstract":"This paper presents design and analysis of low voltage stable SRAM based 11-transistor high speed content addressable memory (CAM) unit using dual gate (DG) Schottky-barrier carbon nanotube field effect transistor (SB-CNTFET). The 8-transistor highly stable SRAM counterpart of CAM cell contains six p-type and two n-type dual gate SB-CNTFETs where the searching network adds three more p-type transistors. The circuit compatible model of dual gate SB-CNTFET operates steadily at 0.5 V power supply. The design is implemented with Si-MOSFET, MOSFET-like CNTFET and DG SB-CNTFET. For the proposed low voltage SRAM based DG SB-CNTFET CAM cell, we have achieved 120× lesser power-delay-product (PDP) during read operation, 845× lesser PDP during write operation and 407× lesser PDP during search operation compared to similar design using Si-MOSFET. The DG SB-CNTFET based CAM also shows ∼2× less PDP during read-write-search operations as compared to the MOSFET-like CNTFET based CAM cell.","PeriodicalId":403350,"journal":{"name":"2016 IEEE Students’ Technology Symposium (TechSym)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Design of content addressable memory cell using carbon nanotube field effect transistors\",\"authors\":\"Subhajit Das, Debaprasad Das, H. Rahaman\",\"doi\":\"10.1109/TECHSYM.2016.7872669\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents design and analysis of low voltage stable SRAM based 11-transistor high speed content addressable memory (CAM) unit using dual gate (DG) Schottky-barrier carbon nanotube field effect transistor (SB-CNTFET). The 8-transistor highly stable SRAM counterpart of CAM cell contains six p-type and two n-type dual gate SB-CNTFETs where the searching network adds three more p-type transistors. The circuit compatible model of dual gate SB-CNTFET operates steadily at 0.5 V power supply. The design is implemented with Si-MOSFET, MOSFET-like CNTFET and DG SB-CNTFET. For the proposed low voltage SRAM based DG SB-CNTFET CAM cell, we have achieved 120× lesser power-delay-product (PDP) during read operation, 845× lesser PDP during write operation and 407× lesser PDP during search operation compared to similar design using Si-MOSFET. The DG SB-CNTFET based CAM also shows ∼2× less PDP during read-write-search operations as compared to the MOSFET-like CNTFET based CAM cell.\",\"PeriodicalId\":403350,\"journal\":{\"name\":\"2016 IEEE Students’ Technology Symposium (TechSym)\",\"volume\":\"69 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Students’ Technology Symposium (TechSym)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TECHSYM.2016.7872669\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Students’ Technology Symposium (TechSym)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TECHSYM.2016.7872669","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

本文采用双栅(DG)肖特基势垒碳纳米管场效应晶体管(SB-CNTFET)设计和分析了基于SRAM的11晶体管高速内容可寻址存储器(CAM)单元。CAM单元的8晶体管高稳定SRAM对应器件包含6个p型和2个n型双栅sb - cntfet,其中搜索网络增加了3个p型晶体管。双栅SB-CNTFET电路兼容模型在0.5 V电源下稳定工作。该设计采用Si-MOSFET、类mosfet和DG sb - cnfet实现。对于所提出的基于SRAM的DG SB-CNTFET CAM单元,与使用Si-MOSFET的类似设计相比,我们在读取操作期间实现了120倍的功率延迟积(PDP),在写入操作期间实现了845倍的PDP,在搜索操作期间实现了407倍的PDP。与类似mosfet的基于CNTFET的CAM单元相比,基于DG SB-CNTFET的CAM单元在读写搜索操作期间的PDP也减少了约2倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of content addressable memory cell using carbon nanotube field effect transistors
This paper presents design and analysis of low voltage stable SRAM based 11-transistor high speed content addressable memory (CAM) unit using dual gate (DG) Schottky-barrier carbon nanotube field effect transistor (SB-CNTFET). The 8-transistor highly stable SRAM counterpart of CAM cell contains six p-type and two n-type dual gate SB-CNTFETs where the searching network adds three more p-type transistors. The circuit compatible model of dual gate SB-CNTFET operates steadily at 0.5 V power supply. The design is implemented with Si-MOSFET, MOSFET-like CNTFET and DG SB-CNTFET. For the proposed low voltage SRAM based DG SB-CNTFET CAM cell, we have achieved 120× lesser power-delay-product (PDP) during read operation, 845× lesser PDP during write operation and 407× lesser PDP during search operation compared to similar design using Si-MOSFET. The DG SB-CNTFET based CAM also shows ∼2× less PDP during read-write-search operations as compared to the MOSFET-like CNTFET based CAM cell.
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