CRONO:在未来多核上执行多线程图形算法的基准套件

Masab Ahmad, Farrukh Hijaz, Qingchuan Shi, O. Khan
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引用次数: 103

摘要

在图形设置上操作的算法是高度不规则和非结构化的。当这些算法在不断发展的多核处理器上并行化和执行时,这会导致工作负载不平衡和数据局部性挑战。以前的共享内存多核并行基准套件主要关注各种工作负载领域,如科学、图形、视觉、金融和媒体处理。然而,这些套件缺乏图形应用程序,必须在未来多核建筑设计空间探索的背景下进行评估。本文提出了一种基于多线程图算法的多核共享内存处理器基准测试套件CRONO。我们使用多核模拟器和真实的多核机器设置来分析和描述这些基准测试。CRONO同时使用合成和真实世界的图形。我们的表征表明,在缩放效率的背景下,图形基准是多种多样的,具有挑战性。由于非结构化内存访问模式,它们表现出低局部性,并导致线程之间的细粒度通信。由于网络连接上的内存和同步模式不确定,也会产生能量开销。我们的表征表明,这些挑战仍然存在于最先进的图形算法中,在这种情况下,CRONO可以用来识别、分析和开发新的架构方法,以缓解未来多核处理器的效率瓶颈。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
CRONO: A Benchmark Suite for Multithreaded Graph Algorithms Executing on Futuristic Multicores
Algorithms operating on a graph setting are known to be highly irregular and unstructured. This leads to workload imbalance and data locality challenge when these algorithms are parallelized and executed on the evolving multicore processors. Previous parallel benchmark suites for shared memory multicores have focused on various workload domains, such as scientific, graphics, vision, financial and media processing. However, these suites lack graph applications that must be evaluated in the context of architectural design space exploration for futuristic multicores. This paper presents CRONO, a benchmark suite composed of multi-threaded graph algorithms for shared memory multicore processors. We analyze and characterize these benchmarks using a multicore simulator, as well as a real multicore machine setup. CRONO uses both synthetic and real world graphs. Our characterization shows that graph benchmarks are diverse and challenging in the context of scaling efficiency. They exhibit low locality due to unstructured memory access patterns, and incur fine-grain communication between threads. Energy overheads also occur due to nondeterministic memory and synchronization patterns on network connections. Our characterization reveals that these challenges remain in state-of-the-art graph algorithms, and in this context CRONO can be used to identify, analyze and develop novel architectural methods to mitigate their efficiency bottlenecks in futuristic multicore processors.
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