一种层次搜索运动估计处理器芯片的VLSI设计

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) Pub Date : 1999-08-23 DOI:10.1109/APASIC.1999.824075

Young San Seo, Jae-Hee You

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引用次数: 5

摘要

本文提出了一种结构简单规则的运动估计处理器，在不占用图像数据填充时间的情况下实现了100%的硬件利用率。它可以计算半精度估计，并且使用小型分布式片上映像存储器消除了I/O瓶颈。处理元素的数量可根据并行处理的程度和吞吐量要求进行扩展。用c++语言和VHDL语言对系统进行了设计和验证。

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A VLSI design of hierarchical search motion estimation processor chip

This paper presents a motion estimation processor that has regular and simple structure and achieves 100% hardware utilization without image data fill time. It can compute half-pel precision estimation and I/O bottleneck is eliminated using a small distributed on-chip image memory. The number of processing elements is scalable according to the degree of parallel processing and throughput requirements. It has been designed and verified with C++ and VHDL.

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AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)

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