具有垂直场极板保护的1200V硅基沟栅MOSFET的仿真研究

Yuechao Zheng, D. Hu, Chongning Zhao, Yunpeng Jia, Xintian Zhou, Yu Wu, Ting Li
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引用次数: 0

摘要

本文提出了一种采用垂直场极板保护的sic基沟栅MOSFET结构。与传统的沟槽栅极MOSFET相比,在源端增加了一条深沟槽。源沟槽内填充多晶硅并充当垂直场板。在阻塞状态下,沟槽间的耗尽电荷与垂直场板耦合,可以改变栅极氧化角附近的电场分布。栅极氧化物中较低的场强是设备长期可靠运行的保证。为了研究电荷耦合的影响,选择了双掺杂外延漂移区。第一外延层的掺杂浓度低于第二外延层。深源沟槽的底部,即垂直场板的末端,落在两个外延层的交界处。利用Sentaurus TCAD软件对传统沟槽栅和双沟槽双外延新结构进行了静态特性仿真。仿真结果表明,双沟槽双外延结构具有较高的Baliga优值(FOM),且栅极氧化物在阻断状态下的最大电场可低于5MV/cm。这对闸门的长期运行可靠性是理想的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Simulation study of 1200V SiC-based trench-gate MOSFET with vertical field plate protection
In this paper, a new structure of SiC-base trench-gate MOSFET protected by vertical field plate is proposed. Compared with conventional trench gate MOSFET, a deep trench connected to the source is added. The source trench is filled with polysilicon and acts as a vertical field plate. Under blocking state, the depletion charge between trenches is coupled with the vertical field plate, which can modify the electric field distribution near the gate oxide corner. Lower field strength in gate-oxide is the guarantee for long-term reliable operation of the device. In order to investigate the effect of charge-coupling, double doped epitaxial drift region is selected. The doping concentration of first epi-layer is lower than that of second eip-layer. The bottom of the deep source trench, that is, the end of vertical field plate, falls at the junction for the two epitaxial layer. The static characteristics are simulated for both conventional trench gate and dual trench dual epitaxy new structures by using Sentaurus TCAD. Simulation results show that the new structure with double trenches and double epitaxy has higher Baliga's figures of merit (FOM) Also, under the blocking state, the maximum electric field in gate oxide can be lower than 5MV/cm. That is desirable for the long-term operation reliability of the gate.
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