使用近似电路的小脑模型的有效硬件设计:专题会议论文

Honglan Jiang, Leibo Liu, Jie Han
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引用次数: 2

摘要

小脑优越的可控性激发了人们对计算小脑模型发展的广泛兴趣。许多模型已经应用于机器人的电机控制和图像稳定。通常计算复杂,小脑模型很少在专用硬件中实现。在此,我们提出一种有效的小脑模型硬件设计,使用小面积和低功耗的近似电路。利用小脑固有的容错性,在基于自适应滤波器的小脑模型中,对近似加法器和乘法器的实现进行了仔细评估,以实现精度和硬件使用的良好权衡。通过对小脑控制前庭-眼反射(VOR)的扫视系统进行仿真,验证了该设计的适用性和有效性。仿真结果表明,近似的小脑电路达到了与精确实现相似的精度,但节省了29.7%的面积和37.3%的功耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An efficient hardware design for cerebellar models using approximate circuits: special session paper
The superior controllability of the cerebellum has motivated extensive interest in the development of computational cerebellar models. Many models have been applied to the motor control and image stabilization in robots. Often computationally complex, cerebellar models have rarely been implemented in dedicated hardware. Here, we propose an efficient hardware design for cerebellar models using approximate circuits with a small area and a low power. Leveraging the inherent error tolerance in the cerebellum, approximate adders and multipliers are carefully evaluated for implementations in an adaptive filter based cerebellar model to achieve a good tradeoff in accuracy and hardware usage. A saccade system, whose vestibulo-ocular reflex (VOR) is controlled by the cerebellum, is simulated to show the applicability and effectiveness of the proposed design. Simulation results show that the approximate cerebellar circuit achieves a similar accuracy as an exact implementation, but it saves area by 29.7% and power by 37.3%.
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