Lifting of the 9/7 Wavelet Filter Bank for ECG Signal Analysis Implementation Based on FPGA Target

The electrocardiogram (ECG) signal is often used in healthcare as one of the most significant methods for determining the cardiac condition of a patient. It represents the variations of the electrical activity of the heart as a function of time. This paper presents the hardware Implementation OF THE Lifting 9/7 Wavelet Filter Bank ECG Signal Analysis on cyclone-II EP2C35F72C6 FPGA in Altera DE2 board using VHDL Hardware Description Language (HDL). Quartus-II version 8.1 is a synthesis software tool and ModelSim Altera WEB edition 6.4a is used as a simulator Multiply/divide operations using left/right shifters are used in contrast to standard operations with the aim of reducing time execution, the number of elementary logic, and power consumption.