{"title":"一种无信道的多层路由器","authors":"R. Lunow","doi":"10.1109/DAC.1988.14839","DOIUrl":null,"url":null,"abstract":"The authors have implemented a channelless, gridless, multilayer router as part of the Magic IC layout system. The router is designed to handle routing problems associated with emerging technologies such as wafer-scale integration and multilayered metal processes. Three features distinguish this router: rectilinear Steiner trees with floating segments a routing scheduler, and a corner-stitched database.<<ETX>>","PeriodicalId":230716,"journal":{"name":"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.","volume":"152 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"A channelless, multilayer router\",\"authors\":\"R. Lunow\",\"doi\":\"10.1109/DAC.1988.14839\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors have implemented a channelless, gridless, multilayer router as part of the Magic IC layout system. The router is designed to handle routing problems associated with emerging technologies such as wafer-scale integration and multilayered metal processes. Three features distinguish this router: rectilinear Steiner trees with floating segments a routing scheduler, and a corner-stitched database.<<ETX>>\",\"PeriodicalId\":230716,\"journal\":{\"name\":\"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.\",\"volume\":\"152 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DAC.1988.14839\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"25th ACM/IEEE, Design Automation Conference.Proceedings 1988.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DAC.1988.14839","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The authors have implemented a channelless, gridless, multilayer router as part of the Magic IC layout system. The router is designed to handle routing problems associated with emerging technologies such as wafer-scale integration and multilayered metal processes. Three features distinguish this router: rectilinear Steiner trees with floating segments a routing scheduler, and a corner-stitched database.<>