Design of Various Modulation Schemes using DDS

Modulation is the most crucial method and has to be designed for an FPGA board in order to avoid data loss and minimize antenna size. This work describes the creation and expansion of a digital modulation technique based on an FPGA for high- resolution communication applications. For basic and widely useddigital modulation schemes including BASK, BFSK, BPSK, and QPSK, we are focusing on the implementation of sub-sampling phase-locked loop (SS -PLL) Verilog-based code simulation. The concept of sinusoidal signals generated by a digital design synthesizer is usedin this work. The simulation is performed using the Verilog Hardware Descriptive Language on Modalism with Xilinx-ISE. The work on self-adjustable carrier frequency and bit duration serial data transmission has been finished.