基于自调节两步积分器的单电流开关阵列无rom DDS

Haruki Shibue, H. Nosaka
{"title":"基于自调节两步积分器的单电流开关阵列无rom DDS","authors":"Haruki Shibue, H. Nosaka","doi":"10.1109/RWS55624.2023.10046322","DOIUrl":null,"url":null,"abstract":"This paper presents a new low-power ROM-less DDS with only a single current-switch array. The phase interpolator reduces the jitter contained in the accumulator overflow signal, so the DDS can obtain pulses with high frequency purity. The newly proposed self-adjusting two-step integrator automatically generates ramp waves of appropriate amplitude, eliminating the need to change the threshold voltage according to the clock frequency. Therefore, the dual current-switch array, which was required in the conventional phase interpolation DDSs, can be reduced by half, which is suitable for low power consumption. The frequency purity of this DDS is tolerant to PVT variations, because the manufacturing variation of the threshold voltage or unit current of the current-switch array is irrelevant to the phase interpolation operation. Experimental results confirm frequency synthesizer operation in which the spurious signal level is reduced to less than that of the accumulator.","PeriodicalId":110742,"journal":{"name":"2023 IEEE Radio and Wireless Symposium (RWS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-01-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A ROM-Less DDS with Single Current-Switch Array Using Self-Adjusting Two-Step Integrator\",\"authors\":\"Haruki Shibue, H. Nosaka\",\"doi\":\"10.1109/RWS55624.2023.10046322\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new low-power ROM-less DDS with only a single current-switch array. The phase interpolator reduces the jitter contained in the accumulator overflow signal, so the DDS can obtain pulses with high frequency purity. The newly proposed self-adjusting two-step integrator automatically generates ramp waves of appropriate amplitude, eliminating the need to change the threshold voltage according to the clock frequency. Therefore, the dual current-switch array, which was required in the conventional phase interpolation DDSs, can be reduced by half, which is suitable for low power consumption. The frequency purity of this DDS is tolerant to PVT variations, because the manufacturing variation of the threshold voltage or unit current of the current-switch array is irrelevant to the phase interpolation operation. Experimental results confirm frequency synthesizer operation in which the spurious signal level is reduced to less than that of the accumulator.\",\"PeriodicalId\":110742,\"journal\":{\"name\":\"2023 IEEE Radio and Wireless Symposium (RWS)\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-01-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE Radio and Wireless Symposium (RWS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RWS55624.2023.10046322\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Radio and Wireless Symposium (RWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RWS55624.2023.10046322","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

本文提出了一种新型的低功耗无rom DDS,它只有一个电流开关阵列。相位插补器减少了累加器溢出信号中的抖动,使DDS能够获得高频率纯度的脉冲。新提出的自调节两步积分器自动产生适当幅度的斜坡波,无需根据时钟频率改变阈值电压。因此,可以将传统相位插补dds所需的双电流开关阵列减少一半,适用于低功耗。该DDS的频率纯度可以容忍PVT变化,因为电流开关阵列的阈值电压或单位电流的制造变化与相位插补操作无关。实验结果证实了频率合成器的工作,杂散信号电平被降低到小于累加器的电平。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A ROM-Less DDS with Single Current-Switch Array Using Self-Adjusting Two-Step Integrator
This paper presents a new low-power ROM-less DDS with only a single current-switch array. The phase interpolator reduces the jitter contained in the accumulator overflow signal, so the DDS can obtain pulses with high frequency purity. The newly proposed self-adjusting two-step integrator automatically generates ramp waves of appropriate amplitude, eliminating the need to change the threshold voltage according to the clock frequency. Therefore, the dual current-switch array, which was required in the conventional phase interpolation DDSs, can be reduced by half, which is suitable for low power consumption. The frequency purity of this DDS is tolerant to PVT variations, because the manufacturing variation of the threshold voltage or unit current of the current-switch array is irrelevant to the phase interpolation operation. Experimental results confirm frequency synthesizer operation in which the spurious signal level is reduced to less than that of the accumulator.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信