基于MULTOS物联网信任锚的Kyber性能评估与优化

K. Mayes
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引用次数: 1

摘要

物联网(IoT)可以被视为一个分布式的关键基础设施,由数十亿个设备组成,其中许多设备的处理能力有限。然而,物联网的安全性绝不能受到这些限制的影响,防御措施需要防范当前和未来的威胁。这需要防止实现攻击,以及加载、替换和运行最佳实践加密算法的能力。后量子加密算法正引起人们极大的兴趣,NIST的标准化工作正在进行竞争,以找到最好的算法。先前的研究表明,有错误的学习候选算法可以在智能卡芯片上实现,但这是一个低级的实现,并不能代表将算法加载到安全的物联网芯片平台上。在本文中,我们分析了Kyber768 capke公钥加密组件在MULTOS物联网信任锚芯片上的实际实现。该调查考虑了内存和速度需求以及优化,并将NTT转换版本的Kyber(在NIST竞赛的第一轮中提出)与利用硬件加密协处理器的Kroenecker乘法器技术进行了比较。这项工作从通用的多轮乘法器方法开始,然后通过对输入数据的新颖修改对其进行改进,允许使用内置的模块化乘法函数,从而显着提高乘法轮的速度,并将硬件乘法器的可用大小增加一倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Performance Evaluation and Optimisation for Kyber on the MULTOS IoT Trust-Anchor
The Internet of Things (IoT) may be considered as a distributed, critical infrastructure, consisting of billions of devices, many of which having limited processing capability. However, the security of IoT must not be compromised by these limitations, and defenses need to protect against today's threats, and those predicted for the future. This requires protection against implementation attacks, as well as the ability to load, replace and run, best-practice cryptographic algorithms. Post-Quantum cryptographic algorithms are attracting great interest, and NIST standardization has a competition to find the best. Prior research demonstrated that a Learning With Errors candidate algorithm could be implemented on a smart card chip, however this was a low-level implementation, and not representative of loading the algorithm onto a secured IoT chip platform. In this paper we present analysis from a practical implementation of the Kyber768 CPAPKE public key encryption component on a MULTOS IoT Trust-Anchor chip. The investigation considered memory and speed requirements, and optimizations, and compared the NTT transform version of Kyber, presented in Round 1 of the NIST competition, with the Kroenecker multiplier technique that exploits a hardware crypto-coprocessor. The work began with a generic multi-round multiplier approach, which was then improved using a novel modification of the input data, allowing a built-in modular multiply function to be used, significantly increasing the speed of a multiplication round, and doubling the useable size of the hardware multiplier.
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