{"title":"基于热载流子评价的DRAM感测放大器不平衡辨识","authors":"S. Aur, C. Duvvury, H. McAdams, C. Perrin","doi":"10.1109/VTSA.1991.246704","DOIUrl":null,"url":null,"abstract":"The authors present a study of the causes of inherent imbalance in a DRAM sense amplifier. Refresh time measurements are used to assess this imbalance before and after hot carrier stress. The stress effect on the sense amplitude is compared to simulations using a circuit hot electron effect simulator. This analysis shows that the latch transistor threshold voltage variation, rather than layout capacitance difference, is the cause for the original imbalance.<<ETX>>","PeriodicalId":265093,"journal":{"name":"1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers","volume":"122 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Identification of DRAM sense amplifier imbalance using hot carrier evaluation\",\"authors\":\"S. Aur, C. Duvvury, H. McAdams, C. Perrin\",\"doi\":\"10.1109/VTSA.1991.246704\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors present a study of the causes of inherent imbalance in a DRAM sense amplifier. Refresh time measurements are used to assess this imbalance before and after hot carrier stress. The stress effect on the sense amplitude is compared to simulations using a circuit hot electron effect simulator. This analysis shows that the latch transistor threshold voltage variation, rather than layout capacitance difference, is the cause for the original imbalance.<<ETX>>\",\"PeriodicalId\":265093,\"journal\":{\"name\":\"1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers\",\"volume\":\"122 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTSA.1991.246704\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTSA.1991.246704","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Identification of DRAM sense amplifier imbalance using hot carrier evaluation
The authors present a study of the causes of inherent imbalance in a DRAM sense amplifier. Refresh time measurements are used to assess this imbalance before and after hot carrier stress. The stress effect on the sense amplitude is compared to simulations using a circuit hot electron effect simulator. This analysis shows that the latch transistor threshold voltage variation, rather than layout capacitance difference, is the cause for the original imbalance.<>