{"title":"电阻式开关存储器技术的可靠性挑战","authors":"S. Deora","doi":"10.1109/IIRW.2015.7437057","DOIUrl":null,"url":null,"abstract":"In this work, the important resistive switching memory (RRAM) parameter tunability is studied in DC and AC switching mode. The tradeoff between these parameters for optimized switching are assessed. The variability in low (LRS) and high (HRS) resistance states in each consecutive pulse SET/RESET cycle is studied. It is found that HRS and LRS read current follow the log-normal and normal distributions, respectively. Endurance test from 1million switching cycles demonstrates that in a small percentage of cycles the set operation may fail, which might be missed if not all the HRS and LRS values are read.","PeriodicalId":120239,"journal":{"name":"2015 IEEE International Integrated Reliability Workshop (IIRW)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Reliability challenges in resistive switching memories technology\",\"authors\":\"S. Deora\",\"doi\":\"10.1109/IIRW.2015.7437057\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work, the important resistive switching memory (RRAM) parameter tunability is studied in DC and AC switching mode. The tradeoff between these parameters for optimized switching are assessed. The variability in low (LRS) and high (HRS) resistance states in each consecutive pulse SET/RESET cycle is studied. It is found that HRS and LRS read current follow the log-normal and normal distributions, respectively. Endurance test from 1million switching cycles demonstrates that in a small percentage of cycles the set operation may fail, which might be missed if not all the HRS and LRS values are read.\",\"PeriodicalId\":120239,\"journal\":{\"name\":\"2015 IEEE International Integrated Reliability Workshop (IIRW)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE International Integrated Reliability Workshop (IIRW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IIRW.2015.7437057\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Integrated Reliability Workshop (IIRW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IIRW.2015.7437057","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Reliability challenges in resistive switching memories technology
In this work, the important resistive switching memory (RRAM) parameter tunability is studied in DC and AC switching mode. The tradeoff between these parameters for optimized switching are assessed. The variability in low (LRS) and high (HRS) resistance states in each consecutive pulse SET/RESET cycle is studied. It is found that HRS and LRS read current follow the log-normal and normal distributions, respectively. Endurance test from 1million switching cycles demonstrates that in a small percentage of cycles the set operation may fail, which might be missed if not all the HRS and LRS values are read.