{"title":"FPGA技术与并行计算实现自动微阵列图像处理","authors":"B. Belean, M. Borda, B. Gal, R. Malutan","doi":"10.1109/TSP.2011.6043657","DOIUrl":null,"url":null,"abstract":"Automation, computational time and cost are open subjects in microarray image processing. The present paper proposes image processing techniques together with their implementations in order to eliminate the shortcomings of the existing software platforms for microarray image processing: user intervention, increased computational time and cost. Thus, for each step of microarray image processing, application-specific hardware architectures are designed aiming algorithms parallelization for fast processing. Computational time is estimated and compared with state of the art approaches. The proposed hardware architectures integrated inside microarray scanners deliver microarray image characteristics in an automated manner, excluding the need of an additional software platform. The FPGA technology was chosen for implementation, due to its parallel computation capabilities and ease of reconfiguration.","PeriodicalId":341695,"journal":{"name":"2011 34th International Conference on Telecommunications and Signal Processing (TSP)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"FPGA technology and parallel computing towards automatic microarray image processing\",\"authors\":\"B. Belean, M. Borda, B. Gal, R. Malutan\",\"doi\":\"10.1109/TSP.2011.6043657\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Automation, computational time and cost are open subjects in microarray image processing. The present paper proposes image processing techniques together with their implementations in order to eliminate the shortcomings of the existing software platforms for microarray image processing: user intervention, increased computational time and cost. Thus, for each step of microarray image processing, application-specific hardware architectures are designed aiming algorithms parallelization for fast processing. Computational time is estimated and compared with state of the art approaches. The proposed hardware architectures integrated inside microarray scanners deliver microarray image characteristics in an automated manner, excluding the need of an additional software platform. The FPGA technology was chosen for implementation, due to its parallel computation capabilities and ease of reconfiguration.\",\"PeriodicalId\":341695,\"journal\":{\"name\":\"2011 34th International Conference on Telecommunications and Signal Processing (TSP)\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 34th International Conference on Telecommunications and Signal Processing (TSP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TSP.2011.6043657\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 34th International Conference on Telecommunications and Signal Processing (TSP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TSP.2011.6043657","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
FPGA technology and parallel computing towards automatic microarray image processing
Automation, computational time and cost are open subjects in microarray image processing. The present paper proposes image processing techniques together with their implementations in order to eliminate the shortcomings of the existing software platforms for microarray image processing: user intervention, increased computational time and cost. Thus, for each step of microarray image processing, application-specific hardware architectures are designed aiming algorithms parallelization for fast processing. Computational time is estimated and compared with state of the art approaches. The proposed hardware architectures integrated inside microarray scanners deliver microarray image characteristics in an automated manner, excluding the need of an additional software platform. The FPGA technology was chosen for implementation, due to its parallel computation capabilities and ease of reconfiguration.