Low-frequency DC Input current ripple Reduction in a Two-stage Single-Phase Inverter using DC Input Voltage control

Low-frequency second-order ripple present in the all double stage DC to AC inverter design. This ripple should be less the standard tolerance value for the telecommunication application. DC input current ripple increase the losses and performance of renewable energy sources and battery life get effects. The DC Inverter for telecom application is mandatory to meet the Psophometric Test standard requirements (ETSI300132-2). In this paper the problem of DC ripple reduction with a push-pull converter in the wide voltage operating range (40Vdc-60Vdc) is considered and solved by implementing an additional compensation network in the existing ripple reduction techniques. The DC ripple percentage is measured with & without compensation network analysis by simulation and experimental prototype. By implementing the proposed ripple reduction method, the percentage of ripple reduce from 11.7% to 1.1%. The DC ripple measurements are less than −51db (2mv) and also it is meeting the Psophometric standard requirement. This proposed solution is simulated in PSIM tool verified and experimented in the 800W /1000VA two-stage inverter.