用OHS算法确定两级运放的尺寸

2017 International Electrical Engineering Congress (iEECON) Pub Date : 2017-03-01 DOI:10.1109/IEECON.2017.8075891

S. Mallick, K. Suman, R. Kar, D. Mandal, S. Ghoshal

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引用次数: 0

摘要

本文提出了一种优化设计的CMOS运算放大器。采用基于对立概念的和声搜索(OHS)算法求出该运放的最小MOS面积。本文提出的基于OHS的模拟CMOS运放电路设计，克服了粒子群优化(PSO)和和谐搜索(HS)算法存在的次优收敛和停滞问题。在0.35 μm CMOS工艺中，MOS总面积最小，为121.8 μm2，功耗为616.3 μW。

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Sizing of two stage Op-Amp using OHS algorithm

An optimally designed CMOS Op-Amp has been presented in this article. Opposition concept based harmony Search (OHS) algorithm is applied for obtaining the minimum MOS area of the proposed Op-Amp. The proposed OHS based analog CMOS Op-Amp circuit design has alleviated from the problems of suboptimal convergence and stagnation, unlike Particle Swarm Optimization (PSO) and Harmony Search (HS). The least total MOS area of 121.8 μm2 is obtained in 0.35 μm CMOS technology with a power dissipation of 616.3 μW.

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2017 International Electrical Engineering Congress (iEECON)

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