S. Khokale, T. Ethirajan, H. K. Kakara, B. humphrey, K. Shanbhag, V. Vanukuru, V. Jain, S. Jai
{"title":"具有225 / 475ghz $f_{\\ mathm {T}}/f_{\\text{MAX}}$和0.47dB NFMIN的lnet器件,适用于45nm PDSOI CMOS的SATCOM应用","authors":"S. Khokale, T. Ethirajan, H. K. Kakara, B. humphrey, K. Shanbhag, V. Vanukuru, V. Jain, S. Jai","doi":"10.1109/RFIC54546.2022.9863114","DOIUrl":null,"url":null,"abstract":"An experimental low noise FET (LNFET) device is presented in this paper with $f_{\\mathrm{T}}/f_{\\text{MAX}}$ of 325/475GHz. To authors' knowledge, this is the highest reported $f_{\\text{MAX}}$ for a CMOS device. The device was demonstrated on a 45 nm partially depleted Silicon on insulator (PDSOI) CMOS wafer for low noise amplifier (LNA) design. The device has been developed for Ku/K/Ka-band applications in SATCOM (satellite communications) RF transceiver. It shows $\\sim 0.26/0.47/0.60\\ \\text{dB}$ NFMIN and $\\sim 20.1/17.8/16.6\\ \\text{dB}\\ \\text{MSG}$ at 12 / 20 / 26 GHz respectively. LNA reference circuits at 12GHz and 20GHz were designed using this device with an inductively degenerated source cascode. Measured data from the circuits show NF of $\\sim 0.82\\text{dB}$ at 12GHz and $\\sim 1.23\\text{dB}$ at 20GHz with 15.2dB and 12.3dB gain respectively. Measured NF is the lowest amongst recent silicon-based designs in these frequency bands.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"LNFET device with 325/475GHz $f_{\\\\mathrm{T}}/f_{\\\\text{MAX}}$ and 0.47dB NFMIN at 20GHz for SATCOM applications in 45nm PDSOI CMOS\",\"authors\":\"S. Khokale, T. Ethirajan, H. K. Kakara, B. humphrey, K. Shanbhag, V. Vanukuru, V. Jain, S. Jai\",\"doi\":\"10.1109/RFIC54546.2022.9863114\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An experimental low noise FET (LNFET) device is presented in this paper with $f_{\\\\mathrm{T}}/f_{\\\\text{MAX}}$ of 325/475GHz. To authors' knowledge, this is the highest reported $f_{\\\\text{MAX}}$ for a CMOS device. The device was demonstrated on a 45 nm partially depleted Silicon on insulator (PDSOI) CMOS wafer for low noise amplifier (LNA) design. The device has been developed for Ku/K/Ka-band applications in SATCOM (satellite communications) RF transceiver. It shows $\\\\sim 0.26/0.47/0.60\\\\ \\\\text{dB}$ NFMIN and $\\\\sim 20.1/17.8/16.6\\\\ \\\\text{dB}\\\\ \\\\text{MSG}$ at 12 / 20 / 26 GHz respectively. LNA reference circuits at 12GHz and 20GHz were designed using this device with an inductively degenerated source cascode. Measured data from the circuits show NF of $\\\\sim 0.82\\\\text{dB}$ at 12GHz and $\\\\sim 1.23\\\\text{dB}$ at 20GHz with 15.2dB and 12.3dB gain respectively. Measured NF is the lowest amongst recent silicon-based designs in these frequency bands.\",\"PeriodicalId\":415294,\"journal\":{\"name\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC54546.2022.9863114\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863114","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
LNFET device with 325/475GHz $f_{\mathrm{T}}/f_{\text{MAX}}$ and 0.47dB NFMIN at 20GHz for SATCOM applications in 45nm PDSOI CMOS
An experimental low noise FET (LNFET) device is presented in this paper with $f_{\mathrm{T}}/f_{\text{MAX}}$ of 325/475GHz. To authors' knowledge, this is the highest reported $f_{\text{MAX}}$ for a CMOS device. The device was demonstrated on a 45 nm partially depleted Silicon on insulator (PDSOI) CMOS wafer for low noise amplifier (LNA) design. The device has been developed for Ku/K/Ka-band applications in SATCOM (satellite communications) RF transceiver. It shows $\sim 0.26/0.47/0.60\ \text{dB}$ NFMIN and $\sim 20.1/17.8/16.6\ \text{dB}\ \text{MSG}$ at 12 / 20 / 26 GHz respectively. LNA reference circuits at 12GHz and 20GHz were designed using this device with an inductively degenerated source cascode. Measured data from the circuits show NF of $\sim 0.82\text{dB}$ at 12GHz and $\sim 1.23\text{dB}$ at 20GHz with 15.2dB and 12.3dB gain respectively. Measured NF is the lowest amongst recent silicon-based designs in these frequency bands.