{"title":"通过三电平结构降低高压IGBT逆变器的开关应力","authors":"W. Brumsickle, D. Divan, T. Lipo","doi":"10.1109/APEC.1998.653944","DOIUrl":null,"url":null,"abstract":"High voltage (3.3-4.5 kV) insulated gate bipolar transistors (HVIGBTs) are limited in SOA and ability to be effectively used in hard switched 2-level PWM inverters. The proposed operation sequence for the well known 3-level inverter allows use of HVIGBTs at near-rated voltage while cutting switching loss in half and allowing 3-level PWM for improved harmonics spectrum. Simulation and laboratory results prove the concept.","PeriodicalId":156715,"journal":{"name":"APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-02-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"26","resultStr":"{\"title\":\"Reduced switching stress in high-voltage IGBT inverters via a three-level structure\",\"authors\":\"W. Brumsickle, D. Divan, T. Lipo\",\"doi\":\"10.1109/APEC.1998.653944\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High voltage (3.3-4.5 kV) insulated gate bipolar transistors (HVIGBTs) are limited in SOA and ability to be effectively used in hard switched 2-level PWM inverters. The proposed operation sequence for the well known 3-level inverter allows use of HVIGBTs at near-rated voltage while cutting switching loss in half and allowing 3-level PWM for improved harmonics spectrum. Simulation and laboratory results prove the concept.\",\"PeriodicalId\":156715,\"journal\":{\"name\":\"APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-02-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"26\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APEC.1998.653944\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"APEC '98 Thirteenth Annual Applied Power Electronics Conference and Exposition","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.1998.653944","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Reduced switching stress in high-voltage IGBT inverters via a three-level structure
High voltage (3.3-4.5 kV) insulated gate bipolar transistors (HVIGBTs) are limited in SOA and ability to be effectively used in hard switched 2-level PWM inverters. The proposed operation sequence for the well known 3-level inverter allows use of HVIGBTs at near-rated voltage while cutting switching loss in half and allowing 3-level PWM for improved harmonics spectrum. Simulation and laboratory results prove the concept.
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