Yong-Hee Lee, Chun-Kyun Seok, Bong-Joo Kim, Seung-Bin You, Wang-Seup Yeum, Hojin Park, Byeong-ha Park
{"title":"一款自校准103 db信噪比立体声音频DAC,具有45纳米CMOS的真gnd -d类耳机驱动器","authors":"Yong-Hee Lee, Chun-Kyun Seok, Bong-Joo Kim, Seung-Bin You, Wang-Seup Yeum, Hojin Park, Byeong-ha Park","doi":"10.1109/SOCDC.2010.5682904","DOIUrl":null,"url":null,"abstract":"A stereo audio DAC with ground-centered class-D headphone drivers is fully integrated in a 45nm CMOS technology. A built-in self-calibration is proposed to minimize DC offset voltage causing static power dissipation. The asymmetric averaging PWM is also applied to improve linearity and suppress switching noise and loss. The measured SNR and DR are 103dB and 98dB, respectively.","PeriodicalId":380183,"journal":{"name":"2010 International SoC Design Conference","volume":"33 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A self-calibration 103-dB SNR stereo audio DAC with true-GND class-D headphone drivers in 45nm CMOS\",\"authors\":\"Yong-Hee Lee, Chun-Kyun Seok, Bong-Joo Kim, Seung-Bin You, Wang-Seup Yeum, Hojin Park, Byeong-ha Park\",\"doi\":\"10.1109/SOCDC.2010.5682904\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A stereo audio DAC with ground-centered class-D headphone drivers is fully integrated in a 45nm CMOS technology. A built-in self-calibration is proposed to minimize DC offset voltage causing static power dissipation. The asymmetric averaging PWM is also applied to improve linearity and suppress switching noise and loss. The measured SNR and DR are 103dB and 98dB, respectively.\",\"PeriodicalId\":380183,\"journal\":{\"name\":\"2010 International SoC Design Conference\",\"volume\":\"33 4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 International SoC Design Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCDC.2010.5682904\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 International SoC Design Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCDC.2010.5682904","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A self-calibration 103-dB SNR stereo audio DAC with true-GND class-D headphone drivers in 45nm CMOS
A stereo audio DAC with ground-centered class-D headphone drivers is fully integrated in a 45nm CMOS technology. A built-in self-calibration is proposed to minimize DC offset voltage causing static power dissipation. The asymmetric averaging PWM is also applied to improve linearity and suppress switching noise and loss. The measured SNR and DR are 103dB and 98dB, respectively.