高速数字电路板互连性能的表征:频率/时域方法

V. Ricchiuti, A. Orlandi, G. Antonini, A. Scogna
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引用次数: 4

摘要

在带宽要求不断提高的现代数字设备上,印制电路板互连的电性能影响和限制了数字信号的传输质量。这将影响系统的电磁兼容性(EMC)性能,因为损坏的信号容易增加系统的发射。为了在更远的距离上传输具有高频谐波含量的数字信号,电路板制造必须使用具有低介电损耗的特定介电材料。因此,重要的是表征,作为比特率和传输信号的上升/下降时间的函数,衰减和确定性抖动由于介质材料建立在板。要做到这一点,必须从测量中分离(去嵌入)适配器的影响,适配器用于连接测量仪器的测试板。该方法采用带时域选项的矢量网络分析仪,在测试板上只布置两条不同长度的走线。通过将测量值与仿真值进行比较,验证了该技术的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Characterization of interconnections performances for high speed digital boards: a frequency/time domain approach
On the modern digital equipments, characterized by continually increasing bandwidth requirements, the electrical properties of the printed circuit board interconnections affect and limit the quality of the traveling digital signals. This impacts on the electro-magnetic compatibility (EMC) performances of the system, because corrupted signals can easily increase the emissions from the system. Specific dielectric materials with low dielectric losses must be used for board manufacturing, in order to transmit digital signals with a high frequency harmonic content on longer distances. Consequently it is important to characterize, as function of the bit rate and the rise/fall time of the transmitted signal, the attenuation and deterministic jitter due to the dielectric material building up the board. To do this, one must separate (de-embed) from the measurements the effects of the adapters, used to connect the test board at the measuring instrument. The proposed de-embedding method uses a vector network analyzer with time domain option and only two traces, laid-out on the test board, with different lengths. The technique is validated by comparing the measured values with those coming from simulations.
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