A 19 dBm 0.13µm CMOS parallel class-E switching PA with minimal efficiency degradation under 6 dB back-off

This paper implements a digital Zero Voltage Switching (ZVS) Contour based power amplifier previously proposed by the authors in [1]. The proposed PA implemented in 0.13µm digital CMOS technology, achieves a peak power of 19dBm at a peak drain efficiency of 23% and peak power added efficiency (PAE) of 18% at a center frequency of 800MHz from a 1.2V supply. The PA can maintain its peak efficiency over a 6dB dynamic range of output power by a simultaneous load and duty cycle modulation of a parallel class E PA. The PA achieves an average drain efficiency of 20% and an average PAE of 15% while generating 6dB peak to minimum ratio (PMR) OQPSK signal with bandwidths up to 20Mbps.