一种新的硬件架构设计方法和时间关键应用的先进优化技术

A. Kalyansundar, R. Chattopadhyay
{"title":"一种新的硬件架构设计方法和时间关键应用的先进优化技术","authors":"A. Kalyansundar, R. Chattopadhyay","doi":"10.1109/EUC.2008.113","DOIUrl":null,"url":null,"abstract":"Ubiquitous and pervasive computing systems are characterized by intelligent sensing and computing. These systems seamlessly understand and respond to the environment with little human intervention. Since such systems are required to be small and inobtrusive, embedded systems play an important role in their design. Furthermore, these systems need to run sophisticated applications in a resource constrained environment. In this paper we focus on computer vision applications in such systems. As these applications require larger memory and are computationally intensive, optimization of these algorithms is imperative. This paper discusses some optimization techniques and their impact on execution time in a complex real-world face tracking example. In certain scenarios, the requirement may be to suggest a hardware architecture for achieving a specific response time. This is especially important for mission critical applications in the fields of automotive, medical or defence. However, the estimation of hardware architecture parameters such as core-clock frequency, memory requirement, optimal number of parallel execution paths for a given application is not straight forward. In this paper, we also present a structured approach to determine the hardware architecture for a driver assistance and safety application with stringent performance constraints.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"90 8-9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Novel Approach to Hardware Architecture Design and Advanced Optimization Techniques for Time Critical Applications\",\"authors\":\"A. Kalyansundar, R. Chattopadhyay\",\"doi\":\"10.1109/EUC.2008.113\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Ubiquitous and pervasive computing systems are characterized by intelligent sensing and computing. These systems seamlessly understand and respond to the environment with little human intervention. Since such systems are required to be small and inobtrusive, embedded systems play an important role in their design. Furthermore, these systems need to run sophisticated applications in a resource constrained environment. In this paper we focus on computer vision applications in such systems. As these applications require larger memory and are computationally intensive, optimization of these algorithms is imperative. This paper discusses some optimization techniques and their impact on execution time in a complex real-world face tracking example. In certain scenarios, the requirement may be to suggest a hardware architecture for achieving a specific response time. This is especially important for mission critical applications in the fields of automotive, medical or defence. However, the estimation of hardware architecture parameters such as core-clock frequency, memory requirement, optimal number of parallel execution paths for a given application is not straight forward. In this paper, we also present a structured approach to determine the hardware architecture for a driver assistance and safety application with stringent performance constraints.\",\"PeriodicalId\":430277,\"journal\":{\"name\":\"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing\",\"volume\":\"90 8-9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-12-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EUC.2008.113\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUC.2008.113","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

普适计算系统的特点是智能感知和计算。这些系统无缝地理解和响应环境,几乎没有人为干预。由于这类系统要求小而不显眼,因此嵌入式系统在其设计中起着重要作用。此外,这些系统需要在资源受限的环境中运行复杂的应用程序。本文主要研究计算机视觉在此类系统中的应用。由于这些应用程序需要更大的内存和计算密集型,因此必须对这些算法进行优化。在一个复杂的人脸跟踪实例中,讨论了一些优化技术及其对执行时间的影响。在某些场景中,需求可能是建议实现特定响应时间的硬件体系结构。这对于汽车、医疗或国防领域的关键任务应用尤其重要。然而,硬件架构参数(如核心时钟频率、内存需求、给定应用程序并行执行路径的最佳数量)的估计并不是直截了当的。在本文中,我们还提出了一种结构化的方法来确定具有严格性能约束的驾驶员辅助和安全应用程序的硬件架构。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Novel Approach to Hardware Architecture Design and Advanced Optimization Techniques for Time Critical Applications
Ubiquitous and pervasive computing systems are characterized by intelligent sensing and computing. These systems seamlessly understand and respond to the environment with little human intervention. Since such systems are required to be small and inobtrusive, embedded systems play an important role in their design. Furthermore, these systems need to run sophisticated applications in a resource constrained environment. In this paper we focus on computer vision applications in such systems. As these applications require larger memory and are computationally intensive, optimization of these algorithms is imperative. This paper discusses some optimization techniques and their impact on execution time in a complex real-world face tracking example. In certain scenarios, the requirement may be to suggest a hardware architecture for achieving a specific response time. This is especially important for mission critical applications in the fields of automotive, medical or defence. However, the estimation of hardware architecture parameters such as core-clock frequency, memory requirement, optimal number of parallel execution paths for a given application is not straight forward. In this paper, we also present a structured approach to determine the hardware architecture for a driver assistance and safety application with stringent performance constraints.
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