具有应变si通道的先进soi - mosfet用于高速cmos电子/空穴迁移率增强

2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104) Pub Date : 2000-06-13 DOI:10.1109/VLSIT.2000.852829

T. Mizuno, N. Sugiyama, H. Satake, S. Takagi

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引用次数: 21

摘要

在这项工作中，我们提出了应变si mosfet在不同Ge含量的双层SiGe薄膜上作为高性能p- mosfet。实际上，我们首次在包括双异质结构(Si/sub 0.82/Ge/sub 0.18//Si/sub 0.9/Ge/sub 0.1/)的应变- soi p- mosfet中证明了高空穴迁移率(比控制- soi mosfet提高45%，比通用迁移率提高30%)。此外，还证明了n沟道应变soi mosfet中使用Ge含量低至10%的单SiGe层时，电子迁移率提高了约60%。

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Advanced SOI-MOSFETs with strained-Si channel for high speed CMOS-electron/hole mobility enhancement

In this work, we propose strained-Si MOSFETs on double-layer SiGe films with different Ge contents as high performance p-MOSFETs. Actually, we demonstrate high hole mobility enhancement (45% against that in control-SOI MOSFETs and 30% against the universal mobility) in strained-SOI p-MOSFETs including double-hetero structures (Si/sub 0.82/Ge/sub 0.18//Si/sub 0.9/Ge/sub 0.1/) for the first time. Moreover, it is also demonstrated that the electron mobility in n-channel strained-SOI MOSFETs is enhanced by about 60%, using single SiGe layer with the Ge content of as low as 10%.

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2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)

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