采用平均电流模式控制的新型单电感二次降压变换器

Jiann-Jong Chen, Bo-Han Hwang, Che-Min Kung, Weiyu Tai, Yuh-Shyan Hwang
{"title":"采用平均电流模式控制的新型单电感二次降压变换器","authors":"Jiann-Jong Chen, Bo-Han Hwang, Che-Min Kung, Weiyu Tai, Yuh-Shyan Hwang","doi":"10.1109/ICIEA.2010.5515818","DOIUrl":null,"url":null,"abstract":"A new single-inductor quadratic buck converter using average-current-mode control without slope-compensation is proposed in this paper. The average-current-mode technology minimizes several power-management problems, such as efficiency, EMI, size, transient response, design complexity, and cost. In DC/DC conversion applications that require a wide range of input and/or output voltages, conventional PWM buck converter topologies always operate at exceptionally low duty ratios, which limit the operation to the lower switching frequencies due to minimum ON-time of the transistor switch. The DC voltage conversion ratio of the proposed converter has a quadratic dependence on duty cycle, producing an extensive step-down; therefore, the high conversion ratio is achieved. This scheme employs an inner loop for current gain and an outer loop for PID-controller. The proposed buck converter only uses an inductor, two capacitors and single control circuit to achieve quadratic conversion ratio, therefore, an inductor and a control circuit is reduced. The advantages of the proposed quadratic buck converter are fast transient response, no use for slope-compensation, high-conversion-ratio, and an inductor reduction. The prototype of the proposed quadratic buck converter has been fabricated with TSMC 0.35µm 2P4M CMOS processes. The total chip area is 1.917 × 2.334 mm2.","PeriodicalId":234296,"journal":{"name":"2010 5th IEEE Conference on Industrial Electronics and Applications","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":"{\"title\":\"A new single-inductor quadratic buck converter using average-current-mode control without slope-compensation\",\"authors\":\"Jiann-Jong Chen, Bo-Han Hwang, Che-Min Kung, Weiyu Tai, Yuh-Shyan Hwang\",\"doi\":\"10.1109/ICIEA.2010.5515818\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new single-inductor quadratic buck converter using average-current-mode control without slope-compensation is proposed in this paper. The average-current-mode technology minimizes several power-management problems, such as efficiency, EMI, size, transient response, design complexity, and cost. In DC/DC conversion applications that require a wide range of input and/or output voltages, conventional PWM buck converter topologies always operate at exceptionally low duty ratios, which limit the operation to the lower switching frequencies due to minimum ON-time of the transistor switch. The DC voltage conversion ratio of the proposed converter has a quadratic dependence on duty cycle, producing an extensive step-down; therefore, the high conversion ratio is achieved. This scheme employs an inner loop for current gain and an outer loop for PID-controller. The proposed buck converter only uses an inductor, two capacitors and single control circuit to achieve quadratic conversion ratio, therefore, an inductor and a control circuit is reduced. The advantages of the proposed quadratic buck converter are fast transient response, no use for slope-compensation, high-conversion-ratio, and an inductor reduction. The prototype of the proposed quadratic buck converter has been fabricated with TSMC 0.35µm 2P4M CMOS processes. The total chip area is 1.917 × 2.334 mm2.\",\"PeriodicalId\":234296,\"journal\":{\"name\":\"2010 5th IEEE Conference on Industrial Electronics and Applications\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"24\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 5th IEEE Conference on Industrial Electronics and Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICIEA.2010.5515818\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 5th IEEE Conference on Industrial Electronics and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIEA.2010.5515818","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 24

摘要

本文提出了一种新的采用平均电流模式控制的单电感二次降压变换器。平均电流模式技术最大限度地减少了几个电源管理问题,如效率、EMI、尺寸、瞬态响应、设计复杂性和成本。在需要宽范围输入和/或输出电压的DC/DC转换应用中,传统的PWM降压转换器拓扑结构总是在极低的占空比下工作,由于晶体管开关的最小导通时间,这限制了操作到较低的开关频率。所提出的变换器的直流电压转换比与占空比具有二次依赖关系,产生广泛的降压;因此,实现了高转化率。该方案采用电流增益的内环和pid控制器的外环。该降压变换器仅使用一个电感、两个电容和单个控制电路即可实现二次变换器,从而减少了电感和控制电路。所提出的二次降压变换器的优点是瞬态响应快、不需要斜坡补偿、高转换比和电感减小。采用台积电0.35µm 2P4M CMOS工艺制作了二次降压变换器的原型。总芯片面积为1.917 × 2.334 mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A new single-inductor quadratic buck converter using average-current-mode control without slope-compensation
A new single-inductor quadratic buck converter using average-current-mode control without slope-compensation is proposed in this paper. The average-current-mode technology minimizes several power-management problems, such as efficiency, EMI, size, transient response, design complexity, and cost. In DC/DC conversion applications that require a wide range of input and/or output voltages, conventional PWM buck converter topologies always operate at exceptionally low duty ratios, which limit the operation to the lower switching frequencies due to minimum ON-time of the transistor switch. The DC voltage conversion ratio of the proposed converter has a quadratic dependence on duty cycle, producing an extensive step-down; therefore, the high conversion ratio is achieved. This scheme employs an inner loop for current gain and an outer loop for PID-controller. The proposed buck converter only uses an inductor, two capacitors and single control circuit to achieve quadratic conversion ratio, therefore, an inductor and a control circuit is reduced. The advantages of the proposed quadratic buck converter are fast transient response, no use for slope-compensation, high-conversion-ratio, and an inductor reduction. The prototype of the proposed quadratic buck converter has been fabricated with TSMC 0.35µm 2P4M CMOS processes. The total chip area is 1.917 × 2.334 mm2.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信