A CNN/FPGA Co-Exploration Method Based on Hourglass Network

Field Programming Gate Array (FPGA) has become a popular choice for neural network inference for its great potential of parallel computing and abundant on-chip buffer resource. Both software and hardware researchers are trying to explore the design space to obtain the best network model and the best accelerator design. Different from the existing sequential exploration method, we propose a CNN/FPGA co-exploration method to search for the best network model and hardware design simultaneously. We applied our method to Hourglass Network, a widely used model for pose estimation, and the top 5 experimental results show that our method can achieve an average of 22.44% faster in computation, 16.48% faster in memory access, and 17.81% faster in total, with a minor accuracy loss of 0.75%. The whole search and training process only cost 75 GPU hours.