OPC Methodology To Overcome Mask Error Effect On Below 0.25 um Lithography Generation

1. Motivation Lithography for below 0.25 um generation strongly demands OPC(Optica1 Proximity Correction) technics to achieve the better pattem fidelity that normally improves overlay margin, CD tolerance, Device characteristics such as leakage current margin and etc. The first step to design mask layout having OPC should be simulation. Normally, the main tasks of this simulation step are of making decision the best type and dimension of OPC. However, sometimes real pattern results on wafer level exposed by the mask that is designed with based on simulation, are different from designer’s expectation. This phenomenon is explicitly getting worse and worse due to the increasing of mask error when going to 4 x reticle and aggressive OPC patterns for below 0.25 um generation device. In this paper, we try to build up new simulation methodology to obtain the better matching results between simulation and real experimental results.