{"title":"深耗尽沟道MOSFET阈值电压建模及其模拟性能仿真研究","authors":"S. Sengupta, Soumya Pandit","doi":"10.1109/ICECI.2014.6767383","DOIUrl":null,"url":null,"abstract":"This paper presents the analytical models for the long channel and short channel threshold voltage of Deeply Depleted Channel (DDC) MOS transistor. The model predicted results are compared with TCAD simulation results. This paper also reports the comparative study of the analog performances of the DDC MOS transistor with those of a uniformly doped transistor. The TCAD tool is calibrated with published data of DDC MOS transistor. The better immunity of the DDC MOS transistor in comparison to the conventional bulk MOS transistor is demonstrated through simulation results.","PeriodicalId":315219,"journal":{"name":"International Conference on Electronics, Communication and Instrumentation (ICECI)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Threshold voltage modeling of Deeply Depleted Channel MOSFET and simulation study of its analog performances\",\"authors\":\"S. Sengupta, Soumya Pandit\",\"doi\":\"10.1109/ICECI.2014.6767383\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the analytical models for the long channel and short channel threshold voltage of Deeply Depleted Channel (DDC) MOS transistor. The model predicted results are compared with TCAD simulation results. This paper also reports the comparative study of the analog performances of the DDC MOS transistor with those of a uniformly doped transistor. The TCAD tool is calibrated with published data of DDC MOS transistor. The better immunity of the DDC MOS transistor in comparison to the conventional bulk MOS transistor is demonstrated through simulation results.\",\"PeriodicalId\":315219,\"journal\":{\"name\":\"International Conference on Electronics, Communication and Instrumentation (ICECI)\",\"volume\":\"54 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-03-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Conference on Electronics, Communication and Instrumentation (ICECI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECI.2014.6767383\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Electronics, Communication and Instrumentation (ICECI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECI.2014.6767383","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Threshold voltage modeling of Deeply Depleted Channel MOSFET and simulation study of its analog performances
This paper presents the analytical models for the long channel and short channel threshold voltage of Deeply Depleted Channel (DDC) MOS transistor. The model predicted results are compared with TCAD simulation results. This paper also reports the comparative study of the analog performances of the DDC MOS transistor with those of a uniformly doped transistor. The TCAD tool is calibrated with published data of DDC MOS transistor. The better immunity of the DDC MOS transistor in comparison to the conventional bulk MOS transistor is demonstrated through simulation results.