基于自适应遗传算法的逻辑电路进化设计与多目标优化方法

Shuguang Zhao, Jianxun Zhao, L. Jiao
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引用次数: 7

摘要

可进化硬件是一种基于人工进化的自动化电路设计和发现奇特模块和原理的有前途的途径。为了提高逻辑电路门级进化的速度和规模,从而达到综合优化设计结果,本文提出了一种基于自适应遗传算法的逻辑电路门级进化方法。首先,它采用了一种基于数组模型的编码方案,允许灵活地改变所组成的逻辑单元的逻辑功能和互连。其次,采用权向量自适应和电路仿真的多目标适应度评价机制;第三,它具有适应策略,使交叉概率和突变概率随个体多样性和遗传过程而变化。通过在算术电路上的实验,验证了该方法的有效性、有效性和创新性,与传统的或进化的方法相比,得到了结构新颖、逻辑单元少、运算速度快的功能正确的电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Adaptive genetic algorithm based approach for evolutionary design and multi-objective optimization of logic circuits
Evolvable hardware is an artificial-evolution based promising path to automated design of circuits and discovery of fancy modules and principles. To improve gate-level evolution of logic circuits in speed and scale for synthetically optimized design results, an adaptive genetic algorithm based approach is presented in this paper. First, it employs an array-model-based encoding scheme that allows flexible changes of comprised logic cells' logic functions and interconnections. Second, it adopts a multi-objective fitness evaluation mechanism with weight-vector adapting and circuit simulation. Third, it features an adaptation strategy that enables crossover probability and mutation probability to vary with the individual diversity and the genetic process. By virtue of these measures, it was validated effective, efficient and innovative by some experiments on arithmetic circuits, in which we obtained functionally correct circuits with novel structures, fewer logic cells and higher operating speed as compared with results of some conventional or evolutionary approaches.
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