基于门级符号布局的数据路径生成器

27th ACM/IEEE Design Automation Conference Pub Date : 1990-06-24 DOI:10.1145/123186.123314

Nobu Matsumoto, Y. Watanabe, K. Usami, Y. Sugeno, H. Hatada, S. Mori

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引用次数: 5

摘要

描述了一种数据路径生成器，它可以生成高密度LSI掩模布局，相当于手工制作的掩模布局。生成器的入口是门级的分层符号布局。位行切片技术是实现大尺寸高密度数据路径生成的关键技术。采用1 μ m CMOS技术，生成了密度为5.64 KTr/mm/sup 2/的21 k晶体管数据路径，其密度大于手工制作数据路径的5.38 KTr/mm/sup 2/。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Datapath generator based on gate-level symbolic layout

A data-path generator that generates high-density LSI mask layouts equivalent to hand-crafted ones is described. An entry of the generator is a hierarchical symbolic layout at the gate level. The bit-and-row-slicing technique is a key feature for realizing large-size and high-density data-path generation. A 21 K-transistor data-path whose density is 5.64 KTr/mm/sup 2/, greater than the 5.38 KTr/mm/sup 2/ of a hand-crafted datapath, was generated using 1- mu m CMOS technology.<>

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来源期刊

27th ACM/IEEE Design Automation Conference

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