为超高速和MS/RF应用领域扩展了0.13 /spl mu/m CMOS技术

2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) Pub Date : 2002-06-11 DOI:10.1109/VLSIT.2002.1015391

C. Chang, C. Chao, Y. Leung, C. Lin, H. Hsu, Y.P. Wang, S.Y. Chang, T. Chiu, J. Shyu, C.C. Wu, C. Wang, R. Chang, C.W. Chen, C.F. Huang, C. Chen, S.H. Chen, T. Yeh, J.Y. Cheng, J. Liaw, Y. Chu, T. Ong, M.C. Yu, C. Yu, H.J. Lin, H. Tao, M. Liang, Y. See, C. H. Diaz, Y.C. Sun

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引用次数: 8

摘要

本文介绍了支持超高速和MS/RF应用的新技术特性，并将其整合到领先的完全可制造的0.13 /spl mu/m CMOS代工技术中(K.K. Young等人，IEDM Tech Digest, pp. 563-566, 2000)。新的核心器件具有15.5 /spl /和标称75 nm物理栅极长度，相对于之前的版本，支持至少10%的性能提升。这些器件为1.2 V应用提供了迄今为止报告的最佳I/sub off/ I/sub dsat/性能。为了支持高速I/O标准，额外的1.8 V-32 /spl Aring/ I/O器件与15.5 /spl Aring/晶体管集成在一起。在这项工作中报告了用于MS/RF应用的前沿无源元件。先进的Cu/低k后端工艺集成可以支持多达九层的金属。

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Extended 0.13 /spl mu/m CMOS technology for the ultra high-speed and MS/RF application segments

This paper introduces new technology features to support ultra high-speed and MS/RF applications incorporated into a leading-edge fully manufacturable 0.13 /spl mu/m CMOS foundry technology (K.K. Young et al, IEDM Tech Digest, pp. 563-566, 2000). New core devices with 15.5 /spl Aring/ and nominal 75 nm physical gate lengths support at least 10% performance improvement with respect to prior release. These devices offer the best I/sub off/-I/sub dsat/ performance reported so far for 1.2 V applications. To support high-speed I/O standards, additional 1.8 V-32 /spl Aring/ I/O devices are integrated with the 15.5 /spl Aring/ transistors. Leading-edge passive elements for MS/RF applications are reported in this work. Advanced Cu/low-k back end process integration that can support up to nine layers of metal is also demonstrated.

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2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)

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