{"title":"光网络上的原子钟比较","authors":"J. Dostál, V. Smotlacha","doi":"10.1109/ICECS.2013.6815506","DOIUrl":null,"url":null,"abstract":"This paper deals with an accurate time transfer and atomic clocks comparison. It presents an adapter for clock comparison over an optical network, especially utilizing dense wavelength division multiplexing (DWDM). The adapter is a field-programmable gate array (FPGA) based device with DWDM transceivers and frequency synthesis functionality. For the second generation of adapters an embedded interpolating time interval counter in FPGA was developed. We also present results of interpolating counter functionality evaluation in respect to SR620 universal counter.","PeriodicalId":117453,"journal":{"name":"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Atomic clock comparison over optical network\",\"authors\":\"J. Dostál, V. Smotlacha\",\"doi\":\"10.1109/ICECS.2013.6815506\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper deals with an accurate time transfer and atomic clocks comparison. It presents an adapter for clock comparison over an optical network, especially utilizing dense wavelength division multiplexing (DWDM). The adapter is a field-programmable gate array (FPGA) based device with DWDM transceivers and frequency synthesis functionality. For the second generation of adapters an embedded interpolating time interval counter in FPGA was developed. We also present results of interpolating counter functionality evaluation in respect to SR620 universal counter.\",\"PeriodicalId\":117453,\"journal\":{\"name\":\"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)\",\"volume\":\"73 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2013.6815506\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2013.6815506","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper deals with an accurate time transfer and atomic clocks comparison. It presents an adapter for clock comparison over an optical network, especially utilizing dense wavelength division multiplexing (DWDM). The adapter is a field-programmable gate array (FPGA) based device with DWDM transceivers and frequency synthesis functionality. For the second generation of adapters an embedded interpolating time interval counter in FPGA was developed. We also present results of interpolating counter functionality evaluation in respect to SR620 universal counter.